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[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
retval. Hoists check before emitting the call to avoid unnecessary work. rdar://11430407 PR12796 llvm-svn: 156628
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@ -2014,7 +2014,8 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
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// Finally update the result.
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UpdateValueMap(I, ResultReg);
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} else if (RVLocs.size() == 1) {
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} else {
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assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!");
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EVT CopyVT = RVLocs[0].getValVT();
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// Special handling for extended integers.
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@ -2030,9 +2031,6 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
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// Finally update the result.
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UpdateValueMap(I, ResultReg);
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} else {
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// Can't handle non-double multi-reg retvals.
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return false;
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}
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}
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@ -2144,6 +2142,15 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) {
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// TODO: For now if we have long calls specified we don't handle the call.
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if (EnableARMLongCalls) return false;
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// Can't handle non-double multi-reg retvals.
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if (RetVT != MVT::isVoid && RetVT != MVT::i32) {
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SmallVector<CCValAssign, 16> RVLocs;
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CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context);
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CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true));
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if (RVLocs.size() >= 2 && RetVT != MVT::f64)
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return false;
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}
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// Set up the argument vectors.
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SmallVector<Value*, 8> Args;
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SmallVector<unsigned, 8> ArgRegs;
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@ -2247,6 +2254,16 @@ bool ARMFastISel::SelectCall(const Instruction *I,
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// TODO: For now if we have long calls specified we don't handle the call.
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if (EnableARMLongCalls) return false;
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// Can't handle non-double multi-reg retvals.
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if (RetVT != MVT::isVoid && RetVT != MVT::i1 && RetVT != MVT::i8 &&
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RetVT != MVT::i16 && RetVT != MVT::i32) {
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SmallVector<CCValAssign, 16> RVLocs;
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CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context);
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CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true));
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if (RVLocs.size() >= 2 && RetVT != MVT::f64)
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return false;
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}
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// Set up the argument vectors.
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SmallVector<Value*, 8> Args;
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SmallVector<unsigned, 8> ArgRegs;
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17
test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll
Normal file
17
test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll
Normal file
@ -0,0 +1,17 @@
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
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; Fast-isel can't handle non-double multi-reg retvals.
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; This test just check to make sure we don't hit the assert in FinishCall.
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define <16 x i8> @foo() nounwind ssp {
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entry:
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ret <16 x i8> zeroinitializer
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}
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define void @t1() nounwind ssp {
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entry:
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; ARM: @t1
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; THUMB: @t1
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%call = call <16 x i8> @foo()
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ret void
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}
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