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Constant folding support for calls to umul.with.overflow(), basically identical to the smul.with.overflow() code.
llvm-svn: 128379
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c9b450fae7
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@ -818,6 +818,7 @@ public:
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APInt usub_ov(const APInt &RHS, bool &Overflow) const;
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APInt sdiv_ov(const APInt &RHS, bool &Overflow) const;
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APInt smul_ov(const APInt &RHS, bool &Overflow) const;
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APInt umul_ov(const APInt &RHS, bool &Overflow) const;
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APInt sshl_ov(unsigned Amt, bool &Overflow) const;
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/// @returns the bit value at bitPosition
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@ -1048,11 +1048,12 @@ llvm::canConstantFoldCallTo(const Function *F) {
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case Intrinsic::ctpop:
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case Intrinsic::ctlz:
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case Intrinsic::cttz:
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::usub_with_overflow:
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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case Intrinsic::usub_with_overflow:
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case Intrinsic::smul_with_overflow:
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case Intrinsic::umul_with_overflow:
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case Intrinsic::convert_from_fp16:
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case Intrinsic::convert_to_fp16:
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case Intrinsic::x86_sse_cvtss2si:
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@ -1362,7 +1363,8 @@ llvm::ConstantFoldCall(Function *F,
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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case Intrinsic::usub_with_overflow:
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case Intrinsic::smul_with_overflow: {
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case Intrinsic::smul_with_overflow:
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case Intrinsic::umul_with_overflow: {
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APInt Res;
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bool Overflow;
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switch (F->getIntrinsicID()) {
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@ -1382,6 +1384,9 @@ llvm::ConstantFoldCall(Function *F,
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case Intrinsic::smul_with_overflow:
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Res = Op1->getValue().smul_ov(Op2->getValue(), Overflow);
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break;
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case Intrinsic::umul_with_overflow:
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Res = Op1->getValue().umul_ov(Op2->getValue(), Overflow);
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break;
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}
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Constant *Ops[] = {
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ConstantInt::get(F->getContext(), Res),
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@ -2078,6 +2078,16 @@ APInt APInt::smul_ov(const APInt &RHS, bool &Overflow) const {
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return Res;
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}
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APInt APInt::umul_ov(const APInt &RHS, bool &Overflow) const {
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APInt Res = *this * RHS;
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if (*this != 0 && RHS != 0)
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Overflow = Res.udiv(RHS) != *this || Res.udiv(*this) != RHS;
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else
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Overflow = false;
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return Res;
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}
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APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const {
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Overflow = ShAmt >= getBitWidth();
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if (Overflow)
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@ -2,6 +2,14 @@
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%i8i1 = type {i8, i1}
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declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.usub.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.umul.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.ssub.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8)
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;;-----------------------------
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;; uadd
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;;-----------------------------
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@ -46,6 +54,28 @@ entry:
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; CHECK: ret %i8i1 { i8 -2, i1 true }
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}
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;;-----------------------------
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;; umul
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;;-----------------------------
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define {i8, i1} @umul_1() nounwind {
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entry:
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%t = call {i8, i1} @llvm.umul.with.overflow.i8(i8 100, i8 3)
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ret {i8, i1} %t
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; CHECK: @umul_1
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; CHECK: ret %i8i1 { i8 44, i1 true }
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}
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define {i8, i1} @umul_2() nounwind {
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entry:
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%t = call {i8, i1} @llvm.umul.with.overflow.i8(i8 100, i8 2)
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ret {i8, i1} %t
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; CHECK: @umul_2
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; CHECK: ret %i8i1 { i8 -56, i1 false }
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}
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;;-----------------------------
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;; sadd
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;;-----------------------------
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@ -163,14 +193,9 @@ entry:
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; CHECK: ret %i8i1 { i8 -10, i1 false }
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}
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declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.usub.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.ssub.with.overflow.i8(i8, i8)
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declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8)
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;;-----------------------------
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;; smul
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;;-----------------------------
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; rdar://8501501
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define {i8, i1} @smul_1() nounwind {
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