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[X86][MMX] Fixed i32 extraction on 32-bit targets
MMX extraction often ends up as extract_i32(bitcast_v2i32(extract_i64(bitcast_v1i64(x86mmx v), 0)), 0) which fails to simplify on 32-bit targets as i64 isn't legal llvm-svn: 296782
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@ -29027,6 +29027,16 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG,
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EVT VT = N->getValueType(0);
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SDLoc dl(InputVector);
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// Detect mmx extraction of all bits as a i64. It works better as a bitcast.
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if (InputVector.getOpcode() == ISD::BITCAST && InputVector.hasOneUse() &&
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VT == MVT::i64 && SrcVT == MVT::v1i64 && isNullConstant(EltIdx)) {
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SDValue MMXSrc = InputVector.getOperand(0);
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// The bitcast source is a direct mmx result.
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if (MMXSrc.getValueType() == MVT::x86mmx)
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return DAG.getBitcast(VT, InputVector);
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}
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// Detect mmx to i32 conversion through a v2i32 elt extract.
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if (InputVector.getOpcode() == ISD::BITCAST && InputVector.hasOneUse() &&
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VT == MVT::i32 && SrcVT == MVT::v2i32 && isNullConstant(EltIdx)) {
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@ -8,15 +8,14 @@ define i32 @test0(<1 x i64>* %v4) nounwind {
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; X32-NEXT: pushl %ebp
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: andl $-8, %esp
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; X32-NEXT: subl $24, %esp
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; X32-NEXT: subl $8, %esp
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; X32-NEXT: movl 8(%ebp), %eax
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; X32-NEXT: movl (%eax), %ecx
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; X32-NEXT: movl 4(%eax), %eax
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: movl %ecx, (%esp)
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; X32-NEXT: pshufw $238, (%esp), %mm0 # mm0 = mem[2,3,2,3]
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; X32-NEXT: movq %mm0, {{[0-9]+}}(%esp)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movd %mm0, %eax
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; X32-NEXT: addl $32, %eax
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; X32-NEXT: movl %ebp, %esp
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; X32-NEXT: popl %ebp
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@ -45,18 +44,11 @@ entry:
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define i32 @test1(i32* nocapture readonly %ptr) nounwind {
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; X32-LABEL: test1:
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; X32: # BB#0: # %entry
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; X32-NEXT: pushl %ebp
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: andl $-8, %esp
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; X32-NEXT: subl $16, %esp
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; X32-NEXT: movl 8(%ebp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movd (%eax), %mm0
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; X32-NEXT: pshufw $232, %mm0, %mm0 # mm0 = mm0[0,2,2,3]
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; X32-NEXT: movq %mm0, (%esp)
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; X32-NEXT: movl (%esp), %eax
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; X32-NEXT: movd %mm0, %eax
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; X32-NEXT: emms
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; X32-NEXT: movl %ebp, %esp
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: test1:
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@ -87,17 +79,10 @@ entry:
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define i32 @test2(i32* nocapture readonly %ptr) nounwind {
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; X32-LABEL: test2:
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; X32: # BB#0: # %entry
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; X32-NEXT: pushl %ebp
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: andl $-8, %esp
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; X32-NEXT: subl $16, %esp
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; X32-NEXT: movl 8(%ebp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: pshufw $232, (%eax), %mm0 # mm0 = mem[0,2,2,3]
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; X32-NEXT: movq %mm0, (%esp)
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; X32-NEXT: movl (%esp), %eax
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; X32-NEXT: movd %mm0, %eax
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; X32-NEXT: emms
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; X32-NEXT: movl %ebp, %esp
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: test2:
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