mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-15 16:07:49 +00:00
do not call expandop on the same value more than once. This fixes
X86/2004-02-22-Casts.llx llvm-svn: 21919
This commit is contained in:
parent
827d1b2e40
commit
c7013ec3a9
@ -2131,10 +2131,6 @@ ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
|
||||
assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
|
||||
|
||||
if (!isSigned) {
|
||||
// If this is unsigned, and not supported, first perform the conversion to
|
||||
// signed, then adjust the result if the sign bit is set.
|
||||
SDOperand SignedConv = ExpandIntToFP(true, DestTy, Source);
|
||||
|
||||
assert(Source.getValueType() == MVT::i64 &&
|
||||
"This only works for 64-bit -> FP");
|
||||
// The 64-bit value loaded will be incorrectly if the 'sign bit' of the
|
||||
@ -2143,6 +2139,11 @@ ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
|
||||
SDOperand Lo, Hi;
|
||||
ExpandOp(Source, Lo, Hi);
|
||||
|
||||
// If this is unsigned, and not supported, first perform the conversion to
|
||||
// signed, then adjust the result if the sign bit is set.
|
||||
SDOperand SignedConv = ExpandIntToFP(true, DestTy,
|
||||
DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), Lo, Hi));
|
||||
|
||||
SDOperand SignSet = DAG.getSetCC(ISD::SETLT, TLI.getSetCCResultTy(), Hi,
|
||||
DAG.getConstant(0, Hi.getValueType()));
|
||||
SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4);
|
||||
|
Loading…
x
Reference in New Issue
Block a user