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[RISCV] Support assembling TLS LA pseudo instructions
This patch adds the pseudo instructions la.tls.ie and la.tls.gd, used in the initial-exec and global-dynamic TLS models respectively when addressing a global. The pseudo instructions are expanded in the assembly parser. llvm-svn: 361499
This commit is contained in:
Lewis Revill
parent
89d96c0ab3
commit
cb0e54a9ab
@ -93,6 +93,14 @@ class RISCVAsmParser : public MCTargetAsmParser {
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// Helper to emit pseudo instruction "la" used in GOT/PC-rel addressing.
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void emitLoadAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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// Helper to emit pseudo instruction "la.tls.ie" used in initial-exec TLS
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// addressing.
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void emitLoadTLSIEAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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// Helper to emit pseudo instruction "la.tls.gd" used in global-dynamic TLS
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// addressing.
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void emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
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// Helper to emit pseudo load/store instruction with a symbol.
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void emitLoadStoreSymbol(MCInst &Inst, unsigned Opcode, SMLoc IDLoc,
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MCStreamer &Out, bool HasTmpReg);
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@ -1590,6 +1598,35 @@ void RISCVAsmParser::emitLoadAddress(MCInst &Inst, SMLoc IDLoc,
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emitAuipcInstPair(DestReg, DestReg, Symbol, VKHi, SecondOpcode, IDLoc, Out);
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}
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void RISCVAsmParser::emitLoadTLSIEAddress(MCInst &Inst, SMLoc IDLoc,
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MCStreamer &Out) {
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// The load TLS IE address pseudo-instruction "la.tls.ie" is used in
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// initial-exec TLS model addressing of global symbols:
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// la.tls.ie rdest, symbol
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// expands to
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// TmpLabel: AUIPC rdest, %tls_ie_pcrel_hi(symbol)
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// Lx rdest, %pcrel_lo(TmpLabel)(rdest)
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MCOperand DestReg = Inst.getOperand(0);
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const MCExpr *Symbol = Inst.getOperand(1).getExpr();
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unsigned SecondOpcode = isRV64() ? RISCV::LD : RISCV::LW;
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emitAuipcInstPair(DestReg, DestReg, Symbol, RISCVMCExpr::VK_RISCV_TLS_GOT_HI,
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SecondOpcode, IDLoc, Out);
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}
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void RISCVAsmParser::emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc,
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MCStreamer &Out) {
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// The load TLS GD address pseudo-instruction "la.tls.gd" is used in
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// global-dynamic TLS model addressing of global symbols:
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// la.tls.gd rdest, symbol
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// expands to
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// TmpLabel: AUIPC rdest, %tls_gd_pcrel_hi(symbol)
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// ADDI rdest, rdest, %pcrel_lo(TmpLabel)
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MCOperand DestReg = Inst.getOperand(0);
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const MCExpr *Symbol = Inst.getOperand(1).getExpr();
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emitAuipcInstPair(DestReg, DestReg, Symbol, RISCVMCExpr::VK_RISCV_TLS_GD_HI,
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RISCV::ADDI, IDLoc, Out);
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}
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void RISCVAsmParser::emitLoadStoreSymbol(MCInst &Inst, unsigned Opcode,
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SMLoc IDLoc, MCStreamer &Out,
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bool HasTmpReg) {
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@ -1657,6 +1694,12 @@ bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
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case RISCV::PseudoLA:
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emitLoadAddress(Inst, IDLoc, Out);
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return false;
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case RISCV::PseudoLA_TLS_IE:
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emitLoadTLSIEAddress(Inst, IDLoc, Out);
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return false;
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case RISCV::PseudoLA_TLS_GD:
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emitLoadTLSGDAddress(Inst, IDLoc, Out);
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return false;
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case RISCV::PseudoLB:
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emitLoadStoreSymbol(Inst, RISCV::LB, IDLoc, Out, /*HasTmpReg=*/false);
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return false;
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@ -926,6 +926,16 @@ let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isCodeGenOnly = 0,
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def PseudoLA : Pseudo<(outs GPR:$dst), (ins bare_symbol:$src), [],
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"la", "$dst, $src">;
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let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isCodeGenOnly = 0,
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isAsmParserOnly = 1 in
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def PseudoLA_TLS_IE : Pseudo<(outs GPR:$dst), (ins bare_symbol:$src), [],
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"la.tls.ie", "$dst, $src">;
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let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isCodeGenOnly = 0,
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isAsmParserOnly = 1 in
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def PseudoLA_TLS_GD : Pseudo<(outs GPR:$dst), (ins bare_symbol:$src), [],
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"la.tls.gd", "$dst, $src">;
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/// Loads
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multiclass LdPat<PatFrag LoadOp, RVInst Inst> {
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@ -1,9 +1,11 @@
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# RUN: llvm-mc %s -triple=riscv32 | FileCheck %s --check-prefixes=CHECK,CHECK-NOPIC
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# RUN: llvm-mc %s -triple=riscv64 | FileCheck %s --check-prefixes=CHECK,CHECK-NOPIC
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# RUN: llvm-mc %s -triple=riscv32 \
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# RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-NOPIC,CHECK-RV32
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# RUN: llvm-mc %s -triple=riscv64 \
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# RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-NOPIC,CHECK-RV64
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# RUN: llvm-mc %s -triple=riscv32 -position-independent \
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# RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PIC,CHECK-PIC-RV32
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# RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PIC,CHECK-RV32,CHECK-PIC-RV32
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# RUN: llvm-mc %s -triple=riscv64 -position-independent \
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# RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PIC,CHECK-PIC-RV64
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# RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PIC,CHECK-RV64,CHECK-PIC-RV64
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# CHECK: .Lpcrel_hi0:
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# CHECK: auipc a0, %pcrel_hi(a_symbol)
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@ -73,47 +75,104 @@ la a3, ra
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la a4, f1
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# CHECK: .Lpcrel_hi10:
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# CHECK: auipc a0, %pcrel_hi(a_symbol)
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# CHECK: lb a0, %pcrel_lo(.Lpcrel_hi10)(a0)
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lb a0, a_symbol
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# CHECK: auipc a0, %tls_ie_pcrel_hi(a_symbol)
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# CHECK-RV32: lw a0, %pcrel_lo(.Lpcrel_hi10)(a0)
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# CHECK-RV64: ld a0, %pcrel_lo(.Lpcrel_hi10)(a0)
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la.tls.ie a0, a_symbol
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# CHECK: .Lpcrel_hi11:
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# CHECK: auipc a1, %pcrel_hi(a_symbol)
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# CHECK: lh a1, %pcrel_lo(.Lpcrel_hi11)(a1)
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lh a1, a_symbol
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# CHECK: auipc a1, %tls_ie_pcrel_hi(another_symbol)
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# CHECK-RV32: lw a1, %pcrel_lo(.Lpcrel_hi11)(a1)
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# CHECK-RV64: ld a1, %pcrel_lo(.Lpcrel_hi11)(a1)
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la.tls.ie a1, another_symbol
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# Check that we can load the address of symbols that are spelled like a register
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# CHECK: .Lpcrel_hi12:
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# CHECK: auipc a2, %pcrel_hi(a_symbol)
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# CHECK: lhu a2, %pcrel_lo(.Lpcrel_hi12)(a2)
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lhu a2, a_symbol
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# CHECK: auipc a2, %tls_ie_pcrel_hi(zero)
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# CHECK-RV32: lw a2, %pcrel_lo(.Lpcrel_hi12)(a2)
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# CHECK-RV64: ld a2, %pcrel_lo(.Lpcrel_hi12)(a2)
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la.tls.ie a2, zero
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# CHECK: .Lpcrel_hi13:
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# CHECK: auipc a3, %pcrel_hi(a_symbol)
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# CHECK: lw a3, %pcrel_lo(.Lpcrel_hi13)(a3)
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lw a3, a_symbol
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# CHECK: auipc a3, %tls_ie_pcrel_hi(ra)
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# CHECK-RV32: lw a3, %pcrel_lo(.Lpcrel_hi13)(a3)
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# CHECK-RV64: ld a3, %pcrel_lo(.Lpcrel_hi13)(a3)
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la.tls.ie a3, ra
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# CHECK: .Lpcrel_hi14:
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# CHECK: auipc a4, %pcrel_hi(a_symbol)
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# CHECK: sb a3, %pcrel_lo(.Lpcrel_hi14)(a4)
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sb a3, a_symbol, a4
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# CHECK: auipc a4, %tls_ie_pcrel_hi(f1)
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# CHECK-RV32: lw a4, %pcrel_lo(.Lpcrel_hi14)(a4)
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# CHECK-RV64: ld a4, %pcrel_lo(.Lpcrel_hi14)(a4)
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la.tls.ie a4, f1
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# CHECK: .Lpcrel_hi15:
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# CHECK: auipc a4, %pcrel_hi(a_symbol)
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# CHECK: sh a3, %pcrel_lo(.Lpcrel_hi15)(a4)
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sh a3, a_symbol, a4
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# CHECK: auipc a0, %tls_gd_pcrel_hi(a_symbol)
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# CHECK: addi a0, a0, %pcrel_lo(.Lpcrel_hi15)
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la.tls.gd a0, a_symbol
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# CHECK: .Lpcrel_hi16:
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# CHECK: auipc a4, %pcrel_hi(a_symbol)
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# CHECK: sw a3, %pcrel_lo(.Lpcrel_hi16)(a4)
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sw a3, a_symbol, a4
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# CHECK: auipc a1, %tls_gd_pcrel_hi(another_symbol)
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# CHECK: addi a1, a1, %pcrel_lo(.Lpcrel_hi16)
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la.tls.gd a1, another_symbol
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# Check that we can load the address of symbols that are spelled like a register
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# CHECK: .Lpcrel_hi17:
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# CHECK: auipc a2, %pcrel_hi(zero)
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# CHECK: lw a2, %pcrel_lo(.Lpcrel_hi17)(a2)
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lw a2, zero
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# CHECK: auipc a2, %tls_gd_pcrel_hi(zero)
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# CHECK: addi a2, a2, %pcrel_lo(.Lpcrel_hi17)
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la.tls.gd a2, zero
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# CHECK: .Lpcrel_hi18:
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# CHECK: auipc a3, %tls_gd_pcrel_hi(ra)
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# CHECK: addi a3, a3, %pcrel_lo(.Lpcrel_hi18)
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la.tls.gd a3, ra
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# CHECK: .Lpcrel_hi19:
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# CHECK: auipc a4, %tls_gd_pcrel_hi(f1)
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# CHECK: addi a4, a4, %pcrel_lo(.Lpcrel_hi19)
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la.tls.gd a4, f1
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# CHECK: .Lpcrel_hi20:
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# CHECK: auipc a0, %pcrel_hi(a_symbol)
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# CHECK: lb a0, %pcrel_lo(.Lpcrel_hi20)(a0)
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lb a0, a_symbol
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# CHECK: .Lpcrel_hi21:
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# CHECK: auipc a1, %pcrel_hi(a_symbol)
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# CHECK: lh a1, %pcrel_lo(.Lpcrel_hi21)(a1)
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lh a1, a_symbol
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# CHECK: .Lpcrel_hi22:
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# CHECK: auipc a2, %pcrel_hi(a_symbol)
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# CHECK: lhu a2, %pcrel_lo(.Lpcrel_hi22)(a2)
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lhu a2, a_symbol
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# CHECK: .Lpcrel_hi23:
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# CHECK: auipc a3, %pcrel_hi(a_symbol)
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# CHECK: lw a3, %pcrel_lo(.Lpcrel_hi23)(a3)
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lw a3, a_symbol
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# CHECK: .Lpcrel_hi24:
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# CHECK: auipc a4, %pcrel_hi(a_symbol)
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# CHECK: sb a3, %pcrel_lo(.Lpcrel_hi24)(a4)
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sb a3, a_symbol, a4
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# CHECK: .Lpcrel_hi25:
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# CHECK: auipc a4, %pcrel_hi(a_symbol)
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# CHECK: sh a3, %pcrel_lo(.Lpcrel_hi25)(a4)
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sh a3, a_symbol, a4
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# CHECK: .Lpcrel_hi26:
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# CHECK: auipc a4, %pcrel_hi(a_symbol)
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# CHECK: sw a3, %pcrel_lo(.Lpcrel_hi26)(a4)
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sw a3, a_symbol, a4
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# Check that we can load the address of symbols that are spelled like a register
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# CHECK: .Lpcrel_hi27:
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# CHECK: auipc a2, %pcrel_hi(zero)
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# CHECK: lw a2, %pcrel_lo(.Lpcrel_hi27)(a2)
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lw a2, zero
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# CHECK: .Lpcrel_hi28:
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# CHECK: auipc a4, %pcrel_hi(zero)
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# CHECK: sw a3, %pcrel_lo(.Lpcrel_hi18)(a4)
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# CHECK: sw a3, %pcrel_lo(.Lpcrel_hi28)(a4)
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sw a3, zero, a4
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