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[sanitizer] [msan] Fix origin store of array types
This patch fixes the memory sanitizer origin store instrumentation for array types. This can be triggered by cases where frontend lowers function return to array type instead of aggregation. For instance, the C code: -- struct mypair { int64_t x; int y; }; mypair my_make_pair(int64_t x, int y) { mypair p; p.x = x; p.y = y; return p; } int foo (int p) { mypair z = my_make_pair(p, 0); return z.y + z.x; } -- It will be lowered with target set to aarch64-linux and -O0 to: -- [...] define i32 @_Z3fooi(i32 %p) #0 { [...] %call = call [2 x i64] @_Z12my_make_pairxi(i64 %conv, i32 0) %1 = bitcast %struct.mypair* %z to [2 x i64]* store [2 x i64] %call, [2 x i64]* %1, align 8 [...] -- The origin store will emit a 'icmp' to test each store value again the TLS origin array. However since 'icmp' does not support ArrayType the memory instrumentation phase will bail out with an error. This patch change it by using the same strategy used for struct type on array. It fixes the 'test/msan/insertvalue_origin.cc' for aarch64 (the -O0 case). llvm-svn: 257375
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@ -692,7 +692,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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const DataLayout &DL = F.getParent()->getDataLayout();
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unsigned OriginAlignment = std::max(kMinOriginAlignment, Alignment);
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unsigned StoreSize = DL.getTypeStoreSize(Shadow->getType());
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if (isa<StructType>(Shadow->getType())) {
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if (Shadow->getType()->isAggregateType()) {
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paintOrigin(IRB, updateOrigin(Origin, IRB),
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getOriginPtr(Addr, IRB, Alignment), StoreSize,
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OriginAlignment);
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23
test/Instrumentation/MemorySanitizer/origin-array.ll
Normal file
23
test/Instrumentation/MemorySanitizer/origin-array.ll
Normal file
@ -0,0 +1,23 @@
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; RUN: opt < %s -msan -msan-check-access-address=0 -msan-track-origins=2 -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
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; Check origin handling of array types.
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define void @foo([2 x i64] %v, [2 x i64]* %p) sanitize_memory {
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entry:
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store [2 x i64] %v, [2 x i64]* %p, align 8
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ret void
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}
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; CHECK-LABEL: @foo
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; CHECK: [[PARAM:%[01-9a-z]+]] = load {{.*}} @__msan_param_tls
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; CHECK: [[ORIGIN:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
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; CHECK: [[TMP1:%[01-9a-z]+]] = ptrtoint
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; CHECK: [[TMP2:%[01-9a-z]+]] = xor i64 [[TMP1]]
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; CHECK: [[TMP3:%[01-9a-z]+]] = inttoptr i64 [[TMP2]] to [2 x i64]*
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; CHECK: store [2 x i64] [[PARAM]], [2 x i64]* [[TMP3]]
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; CHECK: {{.*}} call i32 @__msan_chain_origin(i32 {{.*}}[[ORIGIN]])
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