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implement rdar://8456378 and PR7557 - support for the fstsw,

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an instruction that requires a WHOLE NEW wonderful kind of alias.

llvm-svn: 115015
This commit is contained in:
Chris Lattner 2010-09-29 01:50:45 +00:00
parent 9b9a847b8c
commit cbecb9a4d3
4 changed files with 27 additions and 8 deletions
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2
include/llvm/Target/TargetAsmParser.h
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@ -78,7 +78,7 @@ public:
/// explaining the match failure. /// explaining the match failure.
virtual bool virtual bool
MatchAndEmitInstruction(SMLoc IDLoc, MatchAndEmitInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) = 0; MCStreamer &Out) = 0;
}; };

4
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -81,8 +81,8 @@ private:
bool ParseDirectiveSyntax(SMLoc L); bool ParseDirectiveSyntax(SMLoc L);
bool MatchAndEmitInstruction(SMLoc IDLoc, bool MatchAndEmitInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) { MCStreamer &Out) {
MCInst Inst; MCInst Inst;
unsigned ErrorInfo; unsigned ErrorInfo;
if (MatchInstructionImpl(Operands, Inst, ErrorInfo) == Match_Success) { if (MatchInstructionImpl(Operands, Inst, ErrorInfo) == Match_Success) {

21
lib/Target/X86/AsmParser/X86AsmParser.cpp
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@ -52,7 +52,7 @@ private:
bool ParseDirectiveWord(unsigned Size, SMLoc L); bool ParseDirectiveWord(unsigned Size, SMLoc L);
bool MatchAndEmitInstruction(SMLoc IDLoc, bool MatchAndEmitInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out); MCStreamer &Out);
/// @name Auto-generated Matcher Functions /// @name Auto-generated Matcher Functions
@ -1109,10 +1109,24 @@ bool X86ATTAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
bool X86ATTAsmParser:: bool X86ATTAsmParser::
MatchAndEmitInstruction(SMLoc IDLoc, MatchAndEmitInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) { MCStreamer &Out) {
assert(!Operands.empty() && "Unexpect empty operand list!"); assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!");
// First, handle aliases that expand to multiple instructions.
// FIXME: This should be replaced with a real .td file alias mechanism.
if (Op->getToken() == "fstsw") {
MCInst Inst;
Inst.setOpcode(X86::WAIT);
Out.EmitInstruction(Inst);
delete Operands[0];
Operands[0] = X86Operand::CreateToken("fnstsw", IDLoc);
}
bool WasOriginallyInvalidOperand = false; bool WasOriginallyInvalidOperand = false;
unsigned OrigErrorInfo; unsigned OrigErrorInfo;
MCInst Inst; MCInst Inst;
@ -1136,9 +1150,6 @@ MatchAndEmitInstruction(SMLoc IDLoc,
// valid prefixes, and we could just infer the right unambiguous // valid prefixes, and we could just infer the right unambiguous
// type. However, that requires substantially more matcher support than the // type. However, that requires substantially more matcher support than the
// following hack. // following hack.
X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!");
// Change the operand to point to a temporary token. // Change the operand to point to a temporary token.
StringRef Base = Op->getToken(); StringRef Base = Op->getToken();

8
test/MC/AsmParser/X86/x86_instructions.s
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@ -407,3 +407,11 @@ cwtl // CHECK: cwtl
cbw // CHECK: cbtw cbw // CHECK: cbtw
cwd // CHECK: cwtd cwd // CHECK: cwtd
cdq // CHECK: cltd cdq // CHECK: cltd
// rdar://8456378 and PR7557 - fstsw
fstsw %ax
// CHECK: wait
// CHECK: fnstsw %ax
fstsw (%rax)
// CHECK: wait
// CHECK: fnstsw (%rax)