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AMDGPU: Hoist check for VGPRs
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@ -1026,8 +1026,10 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
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continue;
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RegInterval Interval =
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ScoreBrackets.getRegInterval(&MI, TII, MRI, TRI, I);
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const bool IsVGPR = TRI->isVGPR(*MRI, Op.getReg());
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for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) {
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if (TRI->isVGPR(*MRI, Op.getReg())) {
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if (IsVGPR) {
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// RAW always needs an s_waitcnt. WAW needs an s_waitcnt unless the
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// previous write and this write are the same type of VMEM
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// instruction, in which case they're guaranteed to write their
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