AMDGPU: Hoist check for VGPRs

This commit is contained in:
Matt Arsenault 2020-09-09 16:58:52 -04:00
parent cc5cc5b57a
commit cc42fa16c4

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@ -1026,8 +1026,10 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
continue;
RegInterval Interval =
ScoreBrackets.getRegInterval(&MI, TII, MRI, TRI, I);
const bool IsVGPR = TRI->isVGPR(*MRI, Op.getReg());
for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) {
if (TRI->isVGPR(*MRI, Op.getReg())) {
if (IsVGPR) {
// RAW always needs an s_waitcnt. WAW needs an s_waitcnt unless the
// previous write and this write are the same type of VMEM
// instruction, in which case they're guaranteed to write their