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Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.
llvm-svn: 55777
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7ee14837e6
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cd3ee9198d
@ -157,10 +157,10 @@ bool X86FastISel::X86SelectStore(Instruction* I) {
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X86AddressMode AM;
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if (Op1)
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// Address is in register.
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AM.Base.Reg = Op0;
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AM.Base.Reg = Op1;
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else
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AM.GV = cast<GlobalValue>(V);
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addFullAddress(BuildMI(MBB, TII.get(Opc)), AM);
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addFullAddress(BuildMI(MBB, TII.get(Opc)), AM).addReg(Op0);
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return true;
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}
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@ -255,6 +255,8 @@ X86FastISel::TargetSelectInstruction(Instruction *I) {
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default: break;
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case Instruction::Load:
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return X86SelectLoad(I);
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case Instruction::Store:
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return X86SelectStore(I);
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}
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return false;
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@ -1,5 +1,5 @@
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; RUN: llvm-as < %s | llc -fast-isel -mtriple=i386-apple-darwin -mattr=sse2 | \
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; RUN: grep mov | grep lazy_ptr | count 2
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; RUN: grep mov | grep lazy_ptr | count 1
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@src = external global i32
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