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Print "lock \t foo" instead of "lock \n foo".
This gets gas and llc -filetype=obj to agree on the order of prefixes. For llvm-mc we need to fix the asm parser to know that it makes a difference on which line the "lock" is in. Part of pr23594. llvm-svn: 238232
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@ -48,7 +48,7 @@ void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
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EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
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if (TSFlags & X86II::LOCK)
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OS << "\tlock\n";
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OS << "\tlock\t";
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// Output CALLpcrel32 as "callq" in 64-bit mode.
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// In Intel annotation it's always emitted as "call".
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@ -37,8 +37,7 @@ lt_init.exit: ; preds = %if.end.i, %if.then.
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%4 = call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
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%5 = sub i64 %4, %2 ; <i64> [#uses=1]
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%6 = atomicrmw add i64* getelementptr inbounds ([1216 x i64], [1216 x i64]* @__profiling_callsite_timestamps_live, i32 0, i32 51), i64 %5 monotonic
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;CHECK: lock
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;CHECK-NEXT: {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
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;CHECK: lock {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
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;CHECK-NEXT: cmpl $0,
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;CHECK-NEXT: jne
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%cmp = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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@ -14,8 +14,7 @@ entry:
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; CHECK: addl $1, %ebx
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; CHECK: movl %edx, %ecx
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; CHECK: adcl $0, %ecx
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; CHECK: lock
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; CHECK-NEXT: cmpxchg8b ([[REG]])
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; CHECK: lock cmpxchg8b ([[REG]])
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; CHECK-NEXT: jne
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%0 = atomicrmw add i64* %p, i64 1 seq_cst
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ret void
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@ -16,8 +16,7 @@ define void @foo(i64* %ptr) nounwind inlinehint {
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entry:
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br label %loop
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loop:
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; CHECK: lock
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; CHECK-NEXT: cmpxchg8b
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; CHECK: lock cmpxchg8b
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%pair = cmpxchg i64* %ptr, i64 0, i64 1 monotonic monotonic
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%r = extractvalue { i64, i1 } %pair, 0
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%stored1 = icmp eq i64 %r, 0
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@ -13,8 +13,7 @@ entry:
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; Make sure the fence comes before the comparison, since it
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; clobbers EFLAGS.
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; CHECK: lock
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; CHECK-NEXT: orl {{.*}}, (%esp)
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; CHECK: lock orl {{.*}}, (%esp)
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; CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]]
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if.then: ; preds = %entry
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@ -5,8 +5,7 @@
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define void @test1(i64* %ptr, i64 %val1) {
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; CHECK-LABEL: test1
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; CHECK: lock
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; CHECK-NEXT: cmpxchg8b
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; CHECK: lock cmpxchg8b
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; CHECK-NEXT: jne
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store atomic i64 %val1, i64* %ptr seq_cst, align 8
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ret void
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@ -14,8 +13,7 @@ define void @test1(i64* %ptr, i64 %val1) {
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define i64 @test2(i64* %ptr) {
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; CHECK-LABEL: test2
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; CHECK: lock
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; CHECK-NEXT: cmpxchg8b
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; CHECK: lock cmpxchg8b
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%val = load atomic i64, i64* %ptr seq_cst, align 8
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ret i64 %val
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}
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@ -11,8 +11,7 @@ define void @atomic_maxmin_i6432() {
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; LINUX: seta
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%2 = atomicrmw min i64* @sc64, i64 6 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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@ -20,8 +19,7 @@ define void @atomic_maxmin_i6432() {
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; LINUX: setb
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%3 = atomicrmw umax i64* @sc64, i64 7 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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@ -29,8 +27,7 @@ define void @atomic_maxmin_i6432() {
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; LINUX: seta
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%4 = atomicrmw umin i64* @sc64, i64 8 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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@ -38,8 +35,7 @@ define void @atomic_maxmin_i6432() {
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; LINUX: setb
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock
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; LINUX-NEXT: cmpxchg8b
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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ret void
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}
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@ -9,8 +9,7 @@ entry:
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%tmp = load i64*, i64** %p.addr, align 8
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; CHECK-LABEL: t1:
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; CHECK: movl $2147483648, %eax
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; CHECK: lock
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; CHECK-NEXT: orq %r{{.*}}, (%r{{.*}})
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; CHECK: lock orq %r{{.*}}, (%r{{.*}})
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%0 = atomicrmw or i64* %tmp, i64 2147483648 seq_cst
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ret void
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}
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@ -21,8 +20,7 @@ entry:
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store i64* %p, i64** %p.addr, align 8
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%tmp = load i64*, i64** %p.addr, align 8
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; CHECK-LABEL: t2:
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; CHECK: lock
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; CHECK-NEXT: orq $2147483644, (%r{{.*}})
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; CHECK: lock orq $2147483644, (%r{{.*}})
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%0 = atomicrmw or i64* %tmp, i64 2147483644 seq_cst
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ret void
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}
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@ -4,8 +4,7 @@
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define void @t1(i128* nocapture %p) nounwind ssp {
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entry:
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; CHECK: movl $1, %ebx
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; CHECK: lock
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; CHECK-NEXT: cmpxchg16b
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; CHECK: lock cmpxchg16b
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%r = cmpxchg i128* %p, i128 0, i128 1 seq_cst seq_cst
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ret void
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}
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@ -7,8 +7,7 @@
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define void @gst_atomic_queue_push(i32* %addr) {
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; CHECK-LABEL: gst_atomic_queue_push:
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; CHECK: movl (%eax), [[LHS:%e[a-z]+]]
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; CHECK: lock
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; CHECK-NEXT: orl
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; CHECK: lock orl
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; CHECK: movl (%eax), [[RHS:%e[a-z]+]]
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; CHECK: cmpl [[LHS]], [[RHS]]
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@ -2,8 +2,7 @@
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define void @pr21099(i64* %p) {
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; CHECK-LABEL: pr21099
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; CHECK: lock
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; CHECK-NEXT: addq $-2147483648
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; CHECK: lock addq $-2147483648
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; This number is INT32_MIN: 0x80000000UL
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%1 = atomicrmw add i64* %p, i64 -2147483648 seq_cst
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ret void
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@ -7,29 +7,25 @@ define void @atomic_maxmin_i8() {
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; CHECK: [[LABEL1:\.?LBB[0-9]+_[0-9]+]]:
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; CHECK: movsbl
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; CHECK: cmpl
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; CHECK: lock
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; CHECK-NEXT: cmpxchgb
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; CHECK: lock cmpxchgb
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; CHECK: jne [[LABEL1]]
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%2 = atomicrmw min i8* @sc8, i8 6 acquire
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; CHECK: [[LABEL3:\.?LBB[0-9]+_[0-9]+]]:
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; CHECK: movsbl
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; CHECK: cmpl
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; CHECK: lock
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; CHECK-NEXT: cmpxchgb
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; CHECK: lock cmpxchgb
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; CHECK: jne [[LABEL3]]
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%3 = atomicrmw umax i8* @sc8, i8 7 acquire
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; CHECK: [[LABEL5:\.?LBB[0-9]+_[0-9]+]]:
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; CHECK: movzbl
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; CHECK: cmpl
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; CHECK: lock
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; CHECK-NEXT: cmpxchgb
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; CHECK: lock cmpxchgb
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; CHECK: jne [[LABEL5]]
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%4 = atomicrmw umin i8* @sc8, i8 8 acquire
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; CHECK: [[LABEL7:\.?LBB[0-9]+_[0-9]+]]:
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; CHECK: movzbl
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; CHECK: cmpl
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; CHECK: lock
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; CHECK-NEXT: cmpxchgb
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; CHECK: lock cmpxchgb
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; CHECK: jne [[LABEL7]]
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ret void
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}
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