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[X86][SSE] Fix memory folding of (v)roundsd / (v)roundss
We only had partial memory folding support for the intrinsic definitions, and (as noted on PR27481) was causing FR32/FR64/VR128 mismatch errors with the machine verifier. This patch adds missing memory folding support for both intrinsics and the ffloor/fnearbyint/fceil/frint/ftrunc patterns and in doing so fixes the failing machine verifier stack folding tests from PR27481. Differential Revision: https://reviews.llvm.org/D23276 llvm-svn: 278106
This commit is contained in:
Simon Pilgrim
parent
96d3c1f66a
commit
d111e686cc
@ -1116,6 +1116,8 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI)
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{ X86::PXORrr, X86::PXORrm, TB_ALIGN_16 },
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{ X86::ROUNDSDr, X86::ROUNDSDm, 0 },
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{ X86::ROUNDSSr, X86::ROUNDSSm, 0 },
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{ X86::ROUNDSDr_Int, X86::ROUNDSDm_Int, 0 },
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{ X86::ROUNDSSr_Int, X86::ROUNDSSm_Int, 0 },
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{ X86::SBB32rr, X86::SBB32rm, 0 },
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{ X86::SBB64rr, X86::SBB64rm, 0 },
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{ X86::SHUFPDrri, X86::SHUFPDrmi, TB_ALIGN_16 },
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@ -1412,6 +1414,8 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI)
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{ X86::VPXORrr, X86::VPXORrm, 0 },
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{ X86::VROUNDSDr, X86::VROUNDSDm, 0 },
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{ X86::VROUNDSSr, X86::VROUNDSSm, 0 },
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{ X86::VROUNDSDr_Int, X86::VROUNDSDm_Int, 0 },
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{ X86::VROUNDSSr_Int, X86::VROUNDSSm_Int, 0 },
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{ X86::VSHUFPDrri, X86::VSHUFPDrmi, 0 },
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{ X86::VSHUFPSrri, X86::VSHUFPSrmi, 0 },
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{ X86::VSUBPDrr, X86::VSUBPDrm, 0 },
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@ -6208,9 +6212,11 @@ static bool hasPartialRegUpdate(unsigned Opcode) {
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case X86::ROUNDSDr:
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case X86::ROUNDSDm:
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case X86::ROUNDSDr_Int:
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case X86::ROUNDSDm_Int:
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case X86::ROUNDSSr:
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case X86::ROUNDSSm:
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case X86::ROUNDSSr_Int:
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case X86::ROUNDSSm_Int:
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case X86::RSQRTSSr:
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case X86::RSQRTSSm:
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case X86::RSQRTSSr_Int:
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@ -6289,9 +6295,11 @@ static bool hasUndefRegUpdate(unsigned Opcode) {
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case X86::VROUNDSDr:
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case X86::VROUNDSDm:
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case X86::VROUNDSDr_Int:
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case X86::VROUNDSDm_Int:
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case X86::VROUNDSSr:
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case X86::VROUNDSSm:
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case X86::VROUNDSSr_Int:
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case X86::VROUNDSSm_Int:
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case X86::VRSQRTSSr:
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case X86::VRSQRTSSr_Int:
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case X86::VRSQRTSSm:
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@ -6409,6 +6409,17 @@ let ExeDomain = GenericDomain in {
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"ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
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[]>, Sched<[WriteFAdd]>;
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// Operation, mem.
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let mayLoad = 1 in
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def SSm : SS4AIi8<opcss, MRMSrcMem,
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(outs FR32:$dst), (ins FR32:$src1, f32mem:$src2, i32u8imm:$src3),
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!if(Is2Addr,
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!strconcat(OpcodeStr,
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"ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
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!strconcat(OpcodeStr,
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"ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
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[]>, Sched<[WriteFAddLd, ReadAfterLd]>;
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// Intrinsic operation, reg.
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let isCodeGenOnly = 1 in
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def SSr_Int : SS4AIi8<opcss, MRMSrcReg,
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@ -6422,7 +6433,8 @@ let ExeDomain = GenericDomain in {
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Sched<[WriteFAdd]>;
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// Intrinsic operation, mem.
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def SSm : SS4AIi8<opcss, MRMSrcMem,
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let isCodeGenOnly = 1 in
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def SSm_Int : SS4AIi8<opcss, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, ssmem:$src2, i32u8imm:$src3),
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!if(Is2Addr,
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!strconcat(OpcodeStr,
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@ -6444,6 +6456,17 @@ let ExeDomain = GenericDomain in {
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"sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
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[]>, Sched<[WriteFAdd]>;
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// Operation, mem.
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let mayLoad = 1 in
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def SDm : SS4AIi8<opcsd, MRMSrcMem,
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(outs FR64:$dst), (ins FR64:$src1, f64mem:$src2, i32u8imm:$src3),
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!if(Is2Addr,
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!strconcat(OpcodeStr,
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"sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
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!strconcat(OpcodeStr,
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"sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
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[]>, Sched<[WriteFAddLd, ReadAfterLd]>;
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// Intrinsic operation, reg.
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let isCodeGenOnly = 1 in
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def SDr_Int : SS4AIi8<opcsd, MRMSrcReg,
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@ -6457,7 +6480,8 @@ let ExeDomain = GenericDomain in {
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Sched<[WriteFAdd]>;
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// Intrinsic operation, mem.
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def SDm : SS4AIi8<opcsd, MRMSrcMem,
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let isCodeGenOnly = 1 in
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def SDm_Int : SS4AIi8<opcsd, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, sdmem:$src2, i32u8imm:$src3),
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!if(Is2Addr,
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!strconcat(OpcodeStr,
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@ -1,4 +1,4 @@
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; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c < %s | FileCheck %s
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; RUN: llc -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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@ -1559,7 +1559,13 @@ define double @stack_fold_roundsd(double %a0) optsize {
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}
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declare double @llvm.floor.f64(double) nounwind readnone
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; TODO stack_fold_roundsd_int
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define <2 x double> @stack_fold_roundsd_int(<2 x double> %a0, <2 x double> %a1) optsize {
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;CHECK-LABEL: stack_fold_roundsd_int
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;CHECK: vroundsd $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7)
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ret <2 x double> %2
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}
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declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone
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define float @stack_fold_roundss(float %a0) optsize {
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@ -1571,7 +1577,13 @@ define float @stack_fold_roundss(float %a0) optsize {
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}
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declare float @llvm.floor.f32(float) nounwind readnone
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; TODO stack_fold_roundss_int
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define <4 x float> @stack_fold_roundss_int(<4 x float> %a0, <4 x float> %a1) optsize {
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;CHECK-LABEL: stack_fold_roundss_int
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;CHECK: vroundss $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7)
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ret <4 x float> %2
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}
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declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
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; TODO stack_fold_rsqrtps
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@ -1,4 +1,4 @@
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; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
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; RUN: llc -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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@ -987,7 +987,13 @@ define double @stack_fold_roundsd(double %a0) optsize {
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}
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declare double @llvm.floor.f64(double) nounwind readnone
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; TODO stack_fold_roundsd_int
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define <2 x double> @stack_fold_roundsd_int(<2 x double> %a0, <2 x double> %a1) optsize {
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;CHECK-LABEL: stack_fold_roundsd_int
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;CHECK: roundsd $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7)
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ret <2 x double> %2
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}
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declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone
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define float @stack_fold_roundss(float %a0) minsize {
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@ -999,7 +1005,13 @@ define float @stack_fold_roundss(float %a0) minsize {
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}
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declare float @llvm.floor.f32(float) nounwind readnone
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; TODO stack_fold_roundss_int
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define <4 x float> @stack_fold_roundss_int(<4 x float> %a0, <4 x float> %a1) optsize {
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;CHECK-LABEL: stack_fold_roundss_int
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;CHECK: roundss $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7)
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ret <4 x float> %2
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}
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declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
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; TODO stack_fold_rsqrtps
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