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Initialize X86 DataLayout based on the Triple only.
llvm-svn: 215279
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a4bc0c8914
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@ -298,37 +298,39 @@ void X86Subtarget::initializeEnvironment() {
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MaxInlineSizeThreshold = 128;
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}
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static std::string computeDataLayout(const X86Subtarget &ST) {
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static std::string computeDataLayout(const Triple &TT) {
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// X86 is little endian
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std::string Ret = "e";
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Ret += DataLayout::getManglingComponent(ST.getTargetTriple());
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Ret += DataLayout::getManglingComponent(TT);
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// X86 and x32 have 32 bit pointers.
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if (ST.isTarget64BitILP32() || !ST.is64Bit())
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if ((TT.isArch64Bit() &&
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(TT.getEnvironment() == Triple::GNUX32 || TT.isOSNaCl())) ||
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!TT.isArch64Bit())
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Ret += "-p:32:32";
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// Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
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if (ST.is64Bit() || ST.isOSWindows() || ST.isTargetNaCl())
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if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl())
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Ret += "-i64:64";
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else
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Ret += "-f64:32:64";
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// Some ABIs align long double to 128 bits, others to 32.
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if (ST.isTargetNaCl())
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if (TT.isOSNaCl())
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; // No f80
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else if (ST.is64Bit() || ST.isTargetDarwin())
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else if (TT.isArch64Bit() || TT.isOSDarwin())
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Ret += "-f80:128";
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else
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Ret += "-f80:32";
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// The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
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if (ST.is64Bit())
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if (TT.isArch64Bit())
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Ret += "-n8:16:32:64";
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else
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Ret += "-n8:16:32";
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// The stack is aligned to 32 bits on some ABIs and 128 bits on others.
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if (!ST.is64Bit() && ST.isOSWindows())
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if (!TT.isArch64Bit() && TT.isOSWindows())
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Ret += "-S32";
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else
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Ret += "-S128";
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@ -348,16 +350,16 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
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unsigned StackAlignOverride)
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: X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
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PICStyle(PICStyles::None), TargetTriple(TT),
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DL(computeDataLayout(TargetTriple)),
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StackAlignOverride(StackAlignOverride),
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In64BitMode(TargetTriple.getArch() == Triple::x86_64),
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In32BitMode(TargetTriple.getArch() == Triple::x86 &&
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TargetTriple.getEnvironment() != Triple::CODE16),
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In16BitMode(TargetTriple.getArch() == Triple::x86 &&
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TargetTriple.getEnvironment() == Triple::CODE16),
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DL(computeDataLayout(*this)), TSInfo(DL),
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InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM),
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FrameLowering(TargetFrameLowering::StackGrowsDown, getStackAlignment(),
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is64Bit() ? -8 : -4),
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TSInfo(DL), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
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TLInfo(TM), FrameLowering(TargetFrameLowering::StackGrowsDown,
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getStackAlignment(), is64Bit() ? -8 : -4),
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JITInfo(hasSSE1()) {
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// Determine the PICStyle based on the target selected.
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if (TM.getRelocationModel() == Reloc::Static) {
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@ -223,6 +223,9 @@ protected:
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InstrItineraryData InstrItins;
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private:
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// Calculates type size & alignment
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const DataLayout DL;
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/// StackAlignOverride - Override the stack alignment.
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unsigned StackAlignOverride;
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@ -235,8 +238,6 @@ private:
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/// In16BitMode - True if compiling for 16-bit, false for 32-bit or 64-bit.
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bool In16BitMode;
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// Calculates type size & alignment
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const DataLayout DL;
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X86SelectionDAGInfo TSInfo;
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// Ordering here is important. X86InstrInfo initializes X86RegisterInfo which
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// X86TargetLowering needs.
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