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X86: Fold EXTRACT_SUBVECTORs of a BUILD_VECTOR into a smaller BUILD_VECTOR.
That can usually be lowered efficiently and is common in sandybridge code. It would be nice to do this in DAGCombiner but we can't insert arbitrary BUILD_VECTORs this late. Fixes PR15462. llvm-svn: 176634
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@ -85,6 +85,11 @@ static SDValue Extract128BitVector(SDValue Vec, unsigned IdxVal,
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unsigned NormalizedIdxVal = (((IdxVal * ElVT.getSizeInBits()) / 128)
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* ElemsPerChunk);
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// If the input is a buildvector just emit a smaller one.
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if (Vec.getOpcode() == ISD::BUILD_VECTOR)
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return DAG.getNode(ISD::BUILD_VECTOR, dl, ResultVT,
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Vec->op_begin()+NormalizedIdxVal, ElemsPerChunk);
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SDValue VecIdx = DAG.getIntPtrConstant(NormalizedIdxVal);
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SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
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VecIdx);
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@ -105,7 +105,6 @@ define <32 x i8> @vshift12(<32 x i8> %a) nounwind readnone {
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; CHECK: _vshift08
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; CHECK: vextractf128 $1
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; CHECK: vpslld $23
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; CHECK: vextractf128 $1
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; CHECK: vpslld $23
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define <8 x i32> @vshift08(<8 x i32> %a) nounwind {
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%bitop = shl <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, %a
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@ -129,3 +129,19 @@ entry:
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%2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> undef, <4 x float> %1, i8 1)
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ret <8 x float> %2
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}
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define void @PR15462(i64* %p) {
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store i64 0, i64* %p
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%q = getelementptr i64* %p, i64 1
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store i64 0, i64* %q
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%r = getelementptr i64* %p, i64 2
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store i64 0, i64* %r
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%s = getelementptr i64* %p, i64 3
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store i64 0, i64* %s
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ret void
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; CHECK: PR15462:
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; CHECK: vxorps %xmm
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; CHECK: vmovups
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; CHECK: vmovups
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}
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@ -45,8 +45,8 @@ entry:
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ret <8 x float> %shuffle
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}
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; CHECK: palignr
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; CHECK: palignr
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; CHECK: palignr $8
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; CHECK: psrldq $8
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define <8 x float> @funcF(<8 x float> %a) nounwind uwtable readnone ssp {
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> zeroinitializer, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
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