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[InstCombine][AVX] Split off VPERMILVAR tests and added additional tests for UNDEF mask elements
llvm-svn: 268159
This commit is contained in:
Simon Pilgrim
parent
895490c6cb
commit
d377dbc835
@ -194,66 +194,6 @@ define <4 x float> @test_select(float %f, float %g) {
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ret <4 x float> %ret
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}
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declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>)
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define <4 x float> @test_vpermilvar_ps(<4 x float> %v) {
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; CHECK-LABEL: @test_vpermilvar_ps(
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; CHECK: shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
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ret <4 x float> %a
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}
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declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>)
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define <8 x float> @test_vpermilvar_ps_256(<8 x float> %v) {
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; CHECK-LABEL: @test_vpermilvar_ps_256(
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; CHECK: shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
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%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x float> %a
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}
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declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>)
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define <2 x double> @test_vpermilvar_pd(<2 x double> %v) {
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; CHECK-LABEL: @test_vpermilvar_pd(
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; CHECK: shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 0>
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%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 2, i64 0>)
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ret <2 x double> %a
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}
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declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>)
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define <4 x double> @test_vpermilvar_pd_256(<4 x double> %v) {
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; CHECK-LABEL: @test_vpermilvar_pd_256(
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; CHECK: shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
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%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 3, i64 1, i64 2, i64 0>)
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ret <4 x double> %a
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}
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define <4 x float> @test_vpermilvar_ps_zero(<4 x float> %v) {
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; CHECK-LABEL: @test_vpermilvar_ps_zero(
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; CHECK: shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
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%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> zeroinitializer)
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ret <4 x float> %a
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}
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define <8 x float> @test_vpermilvar_ps_256_zero(<8 x float> %v) {
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; CHECK-LABEL: @test_vpermilvar_ps_256_zero(
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; CHECK: shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>
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%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> zeroinitializer)
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ret <8 x float> %a
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}
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define <2 x double> @test_vpermilvar_pd_zero(<2 x double> %v) {
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; CHECK-LABEL: @test_vpermilvar_pd_zero(
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; CHECK: shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroinitializer
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%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> zeroinitializer)
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ret <2 x double> %a
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}
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define <4 x double> @test_vpermilvar_pd_256_zero(<4 x double> %v) {
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; CHECK-LABEL: @test_vpermilvar_pd_256_zero(
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; CHECK: shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
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%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> zeroinitializer)
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ret <4 x double> %a
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}
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define <2 x i64> @PR24922(<2 x i64> %v) {
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; CHECK-LABEL: @PR24922
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; CHECK: select <2 x i1>
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124
test/Transforms/InstCombine/x86-avx.ll
Normal file
124
test/Transforms/InstCombine/x86-avx.ll
Normal file
@ -0,0 +1,124 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; Verify that instcombine is able to fold identity shuffles.
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define <4 x float> @identity_test_vpermilvar_ps(<4 x float> %v) {
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; CHECK-LABEL: @identity_test_vpermilvar_ps(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK-NEXT: ret <4 x float> [[TMP1]]
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;
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%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
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ret <4 x float> %a
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}
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define <8 x float> @identity_test_vpermilvar_ps_256(<8 x float> %v) {
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; CHECK-LABEL: @identity_test_vpermilvar_ps_256(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
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; CHECK-NEXT: ret <8 x float> [[TMP1]]
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;
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%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x float> %a
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}
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define <2 x double> @identity_test_vpermilvar_pd(<2 x double> %v) {
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; CHECK-LABEL: @identity_test_vpermilvar_pd(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 0>
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; CHECK-NEXT: ret <2 x double> [[TMP1]]
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;
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%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 2, i64 0>)
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ret <2 x double> %a
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}
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define <4 x double> @identity_test_vpermilvar_pd_256(<4 x double> %v) {
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; CHECK-LABEL: @identity_test_vpermilvar_pd_256(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
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; CHECK-NEXT: ret <4 x double> [[TMP1]]
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;
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%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 3, i64 1, i64 2, i64 0>)
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ret <4 x double> %a
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}
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; Instcombine should be able to fold the following byte shuffle to a builtin shufflevector
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; with a shuffle mask of all zeroes.
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define <4 x float> @zero_test_vpermilvar_ps_zero(<4 x float> %v) {
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; CHECK-LABEL: @zero_test_vpermilvar_ps_zero(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: ret <4 x float> [[TMP1]]
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;
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%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> zeroinitializer)
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ret <4 x float> %a
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}
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define <8 x float> @zero_test_vpermilvar_ps_256_zero(<8 x float> %v) {
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; CHECK-LABEL: @zero_test_vpermilvar_ps_256_zero(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>
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; CHECK-NEXT: ret <8 x float> [[TMP1]]
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;
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%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> zeroinitializer)
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ret <8 x float> %a
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}
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define <2 x double> @zero_test_vpermilvar_pd_zero(<2 x double> %v) {
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; CHECK-LABEL: @zero_test_vpermilvar_pd_zero(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroinitializer
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; CHECK-NEXT: ret <2 x double> [[TMP1]]
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;
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%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> zeroinitializer)
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ret <2 x double> %a
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}
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define <4 x double> @zero_test_vpermilvar_pd_256_zero(<4 x double> %v) {
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; CHECK-LABEL: @zero_test_vpermilvar_pd_256_zero(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
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; CHECK-NEXT: ret <4 x double> [[TMP1]]
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;
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%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> zeroinitializer)
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ret <4 x double> %a
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}
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; FIXME: Verify that instcombine is able to fold constant byte shuffles with undef mask elements.
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define <4 x float> @undef_test_vpermilvar_ps(<4 x float> %v) {
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; CHECK-LABEL: @undef_test_vpermilvar_ps(
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; CHECK-NEXT: [[A:%.*]] = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 undef, i32 2, i32 1, i32 undef>)
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; CHECK-NEXT: ret <4 x float> [[A]]
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;
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%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 undef, i32 2, i32 1, i32 undef>)
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ret <4 x float> %a
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}
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define <8 x float> @undef_test_vpermilvar_ps_256(<8 x float> %v) {
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; CHECK-LABEL: @undef_test_vpermilvar_ps_256(
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; CHECK-NEXT: [[A:%.*]] = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 undef, i32 6, i32 5, i32 undef, i32 3, i32 2, i32 1, i32 0>)
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; CHECK-NEXT: ret <8 x float> [[A]]
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;
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%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 undef, i32 6, i32 5, i32 undef, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x float> %a
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}
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define <2 x double> @undef_test_vpermilvar_pd(<2 x double> %v) {
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; CHECK-LABEL: @undef_test_vpermilvar_pd(
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; CHECK-NEXT: [[A:%.*]] = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 undef, i64 0>)
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; CHECK-NEXT: ret <2 x double> [[A]]
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;
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%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 undef, i64 0>)
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ret <2 x double> %a
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}
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define <4 x double> @undef_test_vpermilvar_pd_256(<4 x double> %v) {
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; CHECK-LABEL: @undef_test_vpermilvar_pd_256(
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; CHECK-NEXT: [[A:%.*]] = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 undef, i64 1, i64 2, i64 undef>)
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; CHECK-NEXT: ret <4 x double> [[A]]
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;
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%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 undef, i64 1, i64 2, i64 undef>)
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ret <4 x double> %a
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}
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declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>)
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declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>)
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declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>)
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declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>)
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