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Implement unconditional branching support

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llvm-svn: 4498
This commit is contained in:
Chris Lattner 2002-11-02 19:27:56 +00:00
parent bc981007b0
commit d4010481a7
2 changed files with 11 additions and 1 deletions
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9
lib/Target/X86/InstSelectSimple.cpp
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@ -55,6 +55,7 @@ namespace {
// fixed X86 code for each instruction.
//
void visitReturnInst(ReturnInst &RI);
void visitBranchInst(BranchInst &BI);
void visitAdd(BinaryOperator &B);
void visitShiftInst(ShiftInst &I);
@ -162,6 +163,14 @@ void ISel::visitReturnInst(ReturnInst &I) {
BuildMI(BB, X86::RET, 0);
}
void ISel::visitBranchInst(BranchInst &BI) {
if (BI.isConditional()) // Only handles unconditional branches so far...
visitInstruction(BI);
BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
}
/// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
/// for constant immediate shift values, and for constant immediate
/// shift values equal to 1. Even the general case is sort of special,

3
lib/Target/X86/X86InstrInfo.def
View File

@ -33,8 +33,9 @@ I(PHI , "phi", 0, 0)
// The second instruction must always be the noop instruction: (FIXME, not yet)
I(NOOP , "nop", 0, X86II::Void) // nop 90
// Miscellaneous instructions
// Flow control instructions
I(RET , "ret", M_RET_FLAG, X86II::Void) // ret CB
I(JMP , "jmp", M_BRANCH_FLAG, X86II::Void) // jmp foo EB|E9 cb|w
// Move instructions
I(MOVrr8 , "movb", 0, 0) // R8 = R8 88/r