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Change macro names per naming standard in Makefile.rules.
llvm-svn: 17361
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@ -20,12 +20,12 @@ all :: $(SAMPLES)
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ifdef OPTIMIZE
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% : %.st
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@$(ECHO) "Compiling and Optimizing $(<F)"
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$(VERB)$(LLVMC_EXEC) -O3 $< -o $@
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$(Echo) "Compiling and Optimizing $(<F)"
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$(Verb)$(LLVMC_EXEC) -O3 $< -o $@
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else
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% : %.st
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@$(ECHO) "Compiling $(<F)"
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$(VERB)$(LLVMC_EXEC) $< -o $@
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$(Echo) "Compiling $(<F)"
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$(Verb)$(LLVMC_EXEC) $< -o $@
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endif
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SAMPLES_LL = $(SAMPLES:%=%.ll)
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@ -33,7 +33,7 @@ SAMPLES_BC = $(SAMPLES:%=%.bc)
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SAMPLES_S = $(SAMPLES:%=%.s)
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clean ::
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$(VERB)rm -f gmon.out $(SAMPLES)
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$(Verb)rm -f gmon.out $(SAMPLES)
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#
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# Include the Master Makefile that knows how to build all.
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#
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