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[mips] Use TwoOperandAliasConstraint for ArithLogicR instructions.
This enables TableGen to generate an additional two operand matcher for our ArithLogicR class of instructions (constituted by 3 register operands). E.g.: and $1, $2 <=> and $1, $1, $2 llvm-svn: 204826
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@ -363,36 +363,12 @@ def : InstAlias<"daddu $rs, $imm",
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def : InstAlias<"dadd $rs, $imm",
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(DADDi GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm),
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0>;
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def : InstAlias<"dadd $rs, $rt",
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(DADD GPR64Opnd:$rs, GPR64Opnd:$rs, GPR64Opnd:$rt),
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0>;
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def : InstAlias<"daddu $rs, $rt",
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(DADDu GPR64Opnd:$rs, GPR64Opnd:$rs, GPR64Opnd:$rt),
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0>;
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def : InstAlias<"dsub $rs, $rt",
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(DSUB GPR64Opnd:$rs, GPR64Opnd:$rs, GPR64Opnd:$rt),
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0>;
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def : InstAlias<"dsubu $rs, $rt",
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(DSUBu GPR64Opnd:$rs, GPR64Opnd:$rs, GPR64Opnd:$rt),
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0>;
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def : InstAlias<"add $rs, $imm",
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(ADDi GPR32Opnd:$rs, GPR32Opnd:$rs, simm16:$imm),
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0>;
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def : InstAlias<"addu $rs, $imm",
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(ADDiu GPR32Opnd:$rs, GPR32Opnd:$rs, simm16:$imm),
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0>;
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def : InstAlias<"add $rs, $rt",
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(ADD GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt),
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0>;
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def : InstAlias<"addu $rs, $rt",
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(ADDu GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt),
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0>;
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def : InstAlias<"sub $rs, $rt",
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(SUB GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt),
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0>;
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def : InstAlias<"subu $rs, $rt",
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(SUBu GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt),
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0>;
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let isPseudo=1, usesCustomInserter=1, isCodeGenOnly=1 in {
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def SUBi : MipsInst<(outs GPR32Opnd: $rt), (ins GPR32Opnd: $rs, simm16: $imm),
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"sub\t$rt, $rs, $imm", [], II_DSUB, Pseudo>;
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@ -426,6 +426,7 @@ class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
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[(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
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let isCommutable = isComm;
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let isReMaterializable = 1;
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let TwoOperandAliasConstraint = "$rd = $rs";
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}
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// Arithmetic and logical instructions with 2 register operands.
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@ -127,15 +127,23 @@
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# CHECK: addu $9, $9, $3 # encoding: [0x21,0x48,0x23,0x01]
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# CHECK: addi $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x21]
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# CHECK: addiu $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x25]
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# CHECK: and $5, $5, $6 # encoding: [0x24,0x28,0xa6,0x00]
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# CHECK: mul $9, $9, $3 # encoding: [0x02,0x48,0x23,0x71]
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# CHECK: or $2, $2, $4 # encoding: [0x25,0x10,0x44,0x00]
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# CHECK: sub $9, $9, $3 # encoding: [0x22,0x48,0x23,0x01]
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# CHECK: subu $9, $9, $3 # encoding: [0x23,0x48,0x23,0x01]
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# CHECK: addi $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x21]
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# CHECK: addiu $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x25]
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# CHECK: xor $9, $9, $10 # encoding: [0x26,0x48,0x2a,0x01]
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add $9, $3
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addu $9, $3
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add $9, 10
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addu $9, 10
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and $5, $6
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mul $9, $3
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or $2, $4
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sub $9, $3
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subu $9, $3
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sub $9, 10
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subu $9, 10
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xor $9, $10
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@ -116,6 +116,7 @@
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# Shortcuts for arithmetic instructions
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#------------------------------------------------------------------------------
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# CHECK: and $9, $9, $3 # encoding: [0x24,0x48,0x23,0x01]
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# CHECK: dadd $9, $9, $3 # encoding: [0x2c,0x48,0x23,0x01]
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# CHECK: daddu $9, $9, $3 # encoding: [0x2d,0x48,0x23,0x01]
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# CHECK: daddi $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x61]
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@ -124,6 +125,9 @@
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# CHECK: dsubu $9, $9, $3 # encoding: [0x2f,0x48,0x23,0x01]
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# CHECK: daddi $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x61]
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# CHECK: daddiu $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x65]
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# CHECK: or $9, $9, $3 # encoding: [0x25,0x48,0x23,0x01]
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# CHECK: xor $9, $9, $3 # encoding: [0x26,0x48,0x23,0x01]
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and $9, $3
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dadd $9, $3
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daddu $9, $3
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dadd $9, 10
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@ -132,6 +136,8 @@
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dsubu $9, $3
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dsub $9, 10
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dsubu $9, 10
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or $9, $3
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xor $9, $3
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#------------------------------------------------------------------------------
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# Did you know that GAS supports complex arithmetic expressions in assembly?
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@ -2,6 +2,7 @@
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# CHECK: baddu $9, $6, $7 # encoding: [0x70,0xc7,0x48,0x28]
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# CHECK: baddu $17, $18, $19 # encoding: [0x72,0x53,0x88,0x28]
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# CHECK: dmul $9, $9, $6 # encoding: [0x71,0x26,0x48,0x03]
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# CHECK: dmul $9, $6, $7 # encoding: [0x70,0xc7,0x48,0x03]
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# CHECK: dmul $19, $24, $25 # encoding: [0x73,0x19,0x98,0x03]
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# CHECK: dpop $9, $6 # encoding: [0x70,0xc0,0x48,0x2d]
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@ -13,6 +14,7 @@
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baddu $9, $6, $7
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baddu $17, $18, $19
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dmul $9, $6
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dmul $9, $6, $7
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dmul $19, $24, $25
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dpop $9, $6
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