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[X86] Generate testl instruction through truncates.
Summary: This was introduced in D42646 but ended up being reverted because the original implementation was buggy. Depends on D42646 Reviewers: craig.topper, niravd, spatel, hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42741 llvm-svn: 323899
This commit is contained in:
Amaury Sechet
parent
598a327133
commit
d76ae2bede
@ -3052,70 +3052,55 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
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if (!C) break;
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uint64_t Mask = C->getZExtValue();
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// For example, convert "testl %eax, $8" to "testb %al, $8"
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MVT VT;
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int SubRegOp;
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unsigned Op;
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if (isUInt<8>(Mask) &&
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(!(Mask & 0x80) || hasNoSignedComparisonUses(Node))) {
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SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i8);
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SDValue Reg = N0.getOperand(0);
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// Extract the l-register.
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SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl,
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MVT::i8, Reg);
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// Emit a testb.
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SDNode *NewNode = CurDAG->getMachineNode(X86::TEST8ri, dl, MVT::i32,
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Subreg, Imm);
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// Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
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// one, do not call ReplaceAllUsesWith.
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ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
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SDValue(NewNode, 0));
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CurDAG->RemoveDeadNode(Node);
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return;
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// For example, convert "testl %eax, $8" to "testb %al, $8"
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VT = MVT::i8;
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SubRegOp = X86::sub_8bit;
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Op = X86::TEST8ri;
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} else if (OptForMinSize && isUInt<16>(Mask) &&
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(!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
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// For example, "testl %eax, $32776" to "testw %ax, $32776".
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// NOTE: We only want to form TESTW instructions if optimizing for
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// min size. Otherwise we only save one byte and possibly get a length
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// changing prefix penalty in the decoders.
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VT = MVT::i16;
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SubRegOp = X86::sub_16bit;
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Op = X86::TEST16ri;
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} else if (isUInt<32>(Mask) && N0.getValueType() != MVT::i16 &&
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(!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
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// For example, "testq %rax, $268468232" to "testl %eax, $268468232".
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// NOTE: We only want to run that transform if N0 is 32 or 64 bits.
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// Otherwize, we find ourselves in a position where we have to do
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// promotion. If previous passes did not promote the and, we assume
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// they had a good reason not to and do not promote here.
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VT = MVT::i32;
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SubRegOp = X86::sub_32bit;
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Op = X86::TEST32ri;
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} else {
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// No eligible transformation was found.
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break;
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}
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// For example, "testl %eax, $32776" to "testw %ax, $32776".
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// NOTE: We only want to form TESTW instructions if optimizing for
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// min size. Otherwise we only save one byte and possibly get a length
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// changing prefix penalty in the decoders.
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if (OptForMinSize && isUInt<16>(Mask) && N0.getValueType() != MVT::i16 &&
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(!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
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SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i16);
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SDValue Reg = N0.getOperand(0);
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SDValue Imm = CurDAG->getTargetConstant(Mask, dl, VT);
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SDValue Reg = N0.getOperand(0);
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// Extract the 16-bit subregister.
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SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl,
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MVT::i16, Reg);
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// Extract the subregister if necessary.
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if (N0.getValueType() != VT)
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Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg);
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// Emit a testw.
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SDNode *NewNode = CurDAG->getMachineNode(X86::TEST16ri, dl, MVT::i32,
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Subreg, Imm);
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// Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
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// one, do not call ReplaceAllUsesWith.
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ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
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SDValue(NewNode, 0));
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CurDAG->RemoveDeadNode(Node);
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return;
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}
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// For example, "testq %rax, $268468232" to "testl %eax, $268468232".
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if (isUInt<32>(Mask) && N0.getValueType() == MVT::i64 &&
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(!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
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SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i32);
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SDValue Reg = N0.getOperand(0);
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// Extract the 32-bit subregister.
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SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_32bit, dl,
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MVT::i32, Reg);
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// Emit a testl.
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SDNode *NewNode = CurDAG->getMachineNode(X86::TEST32ri, dl, MVT::i32,
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Subreg, Imm);
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// Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
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// one, do not call ReplaceAllUsesWith.
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ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
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SDValue(NewNode, 0));
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CurDAG->RemoveDeadNode(Node);
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return;
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}
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// Emit a testl or testw.
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SDNode *NewNode = CurDAG->getMachineNode(Op, dl, MVT::i32, Reg, Imm);
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// Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
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// one, do not call ReplaceAllUsesWith.
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ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
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SDValue(NewNode, 0));
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CurDAG->RemoveDeadNode(Node);
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return;
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}
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break;
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}
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@ -51,8 +51,7 @@ define void @fail(i16 %a, <2 x i8> %b) {
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; CHECK-X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
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; CHECK-X86-NEXT: cmpb $123, {{[0-9]+}}(%esp)
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; CHECK-X86-NEXT: sete %al
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; CHECK-X86-NEXT: andl $263, %ecx ## imm = 0x107
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; CHECK-X86-NEXT: testw %cx, %cx
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; CHECK-X86-NEXT: testl $263, %ecx ## imm = 0x107
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; CHECK-X86-NEXT: je LBB1_2
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; CHECK-X86-NEXT: ## %bb.1:
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; CHECK-X86-NEXT: testb %al, %al
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@ -484,8 +484,7 @@ no:
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define void @truncand32(i16 inreg %x) nounwind {
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; CHECK-LINUX64-LABEL: truncand32:
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; CHECK-LINUX64: # %bb.0:
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; CHECK-LINUX64-NEXT: andl $2049, %edi # imm = 0x801
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; CHECK-LINUX64-NEXT: testw %di, %di
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; CHECK-LINUX64-NEXT: testl $2049, %edi # imm = 0x801
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; CHECK-LINUX64-NEXT: je .LBB11_1
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; CHECK-LINUX64-NEXT: # %bb.2: # %no
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; CHECK-LINUX64-NEXT: retq
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@ -498,8 +497,7 @@ define void @truncand32(i16 inreg %x) nounwind {
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; CHECK-WIN32-64-LABEL: truncand32:
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; CHECK-WIN32-64: # %bb.0:
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; CHECK-WIN32-64-NEXT: subq $40, %rsp
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; CHECK-WIN32-64-NEXT: andl $2049, %ecx # imm = 0x801
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; CHECK-WIN32-64-NEXT: testw %cx, %cx
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; CHECK-WIN32-64-NEXT: testl $2049, %ecx # imm = 0x801
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; CHECK-WIN32-64-NEXT: je .LBB11_1
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; CHECK-WIN32-64-NEXT: # %bb.2: # %no
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; CHECK-WIN32-64-NEXT: addq $40, %rsp
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@ -511,8 +509,7 @@ define void @truncand32(i16 inreg %x) nounwind {
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;
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; CHECK-X86-LABEL: truncand32:
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; CHECK-X86: # %bb.0:
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; CHECK-X86-NEXT: andl $2049, %eax # imm = 0x801
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; CHECK-X86-NEXT: testw %ax, %ax
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; CHECK-X86-NEXT: testl $2049, %eax # imm = 0x801
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; CHECK-X86-NEXT: je .LBB11_1
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; CHECK-X86-NEXT: # %bb.2: # %no
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; CHECK-X86-NEXT: retl
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