RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-12-24 20:44:51 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.

Browse Source 
llvm-svn: 175190
This commit is contained in:
Nadav Rotem 2013-02-14 18:28:52 +00:00
parent 402093b121
commit da8ef29d81
2 changed files with 40 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -7702,6 +7702,8 @@ struct ConsecutiveMemoryChainSorter {
bool DAGCombiner::MergeConsecutiveStores(StoreSDNode* St) {
EVT MemVT = St->getMemoryVT();
int64_t ElementSizeBytes = MemVT.getSizeInBits()/8;
bool NoVectors = DAG.getMachineFunction().getFunction()->getAttributes().
hasAttribute(AttributeSet::FunctionIndex, Attribute::NoImplicitFloat);
// Don't merge vectors into wider inputs.
if (MemVT.isVector() || !MemVT.isSimple())
@ -7877,16 +7879,14 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode* St) {
// We only use vectors if the constant is known to be zero and the
// function is not marked with the noimplicitfloat attribute.
if (NonZero || (DAG.getMachineFunction().getFunction()->getAttributes().
hasAttribute(AttributeSet::FunctionIndex,
Attribute::NoImplicitFloat)))
if (NonZero || NoVectors)
LastLegalVectorType = 0;
// Check if we found a legal integer type to store.
if (LastLegalType == 0 && LastLegalVectorType == 0)
return false;
bool UseVector = LastLegalVectorType > LastLegalType;
bool UseVector = (LastLegalVectorType > LastLegalType) && !NoVectors;
unsigned NumElem = UseVector ? LastLegalVectorType : LastLegalType;
// Make sure we have something to merge.
@ -8039,7 +8039,7 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode* St) {
// All loads much share the same chain.
if (LoadNodes[i].MemNode->getChain() != FirstChain)
break;
int64_t CurrAddress = LoadNodes[i].OffsetFromBase;
if (CurrAddress - StartAddress != (ElementSizeBytes * i))
break;
@ -8059,7 +8059,7 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode* St) {
// Only use vector types if the vector type is larger than the integer type.
// If they are the same, use integers.
bool UseVectorTy = LastLegalVectorType > LastLegalIntegerType;
bool UseVectorTy = LastLegalVectorType > LastLegalIntegerType && !NoVectors;
unsigned LastLegalType = std::max(LastLegalVectorType, LastLegalIntegerType);
// We add +1 here because the LastXXX variables refer to location while

34
test/CodeGen/X86/MergeConsecutiveStores.ll
View File

@ -40,6 +40,40 @@ define void @merge_const_store(i32 %count, %struct.A* nocapture %p) nounwind uwt
ret void
}
; No vectors because we use noimplicitfloat
; CHECK: merge_const_store_no_vec
; CHECK-NOT: vmovups
; CHECK: ret
define void @merge_const_store_no_vec(i32 %count, %struct.B* nocapture %p) noimplicitfloat{
%1 = icmp sgt i32 %count, 0
br i1 %1, label %.lr.ph, label %._crit_edge
.lr.ph:
%i.02 = phi i32 [ %10, %.lr.ph ], [ 0, %0 ]
%.01 = phi %struct.B* [ %11, %.lr.ph ], [ %p, %0 ]
%2 = getelementptr inbounds %struct.B* %.01, i64 0, i32 0
store i32 0, i32* %2, align 4
%3 = getelementptr inbounds %struct.B* %.01, i64 0, i32 1
store i32 0, i32* %3, align 4
%4 = getelementptr inbounds %struct.B* %.01, i64 0, i32 2
store i32 0, i32* %4, align 4
%5 = getelementptr inbounds %struct.B* %.01, i64 0, i32 3
store i32 0, i32* %5, align 4
%6 = getelementptr inbounds %struct.B* %.01, i64 0, i32 4
store i32 0, i32* %6, align 4
%7 = getelementptr inbounds %struct.B* %.01, i64 0, i32 5
store i32 0, i32* %7, align 4
%8 = getelementptr inbounds %struct.B* %.01, i64 0, i32 6
store i32 0, i32* %8, align 4
%9 = getelementptr inbounds %struct.B* %.01, i64 0, i32 7
store i32 0, i32* %9, align 4
%10 = add nsw i32 %i.02, 1
%11 = getelementptr inbounds %struct.B* %.01, i64 1
%exitcond = icmp eq i32 %10, %count
br i1 %exitcond, label %._crit_edge, label %.lr.ph
._crit_edge:
ret void
}
; Move the constants using a single vector store.
; CHECK: merge_const_store_vec
; CHECK: vmovups