RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-14 15:38:57 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

* Stop ignoring cc registers, since we actually use them in branches.

Browse Source 
* Added comment as to why we are still ignoring predict and annul bits.

llvm-svn: 6636
This commit is contained in:
Misha Brukman 2003-06-05 23:15:25 +00:00
parent 9dea456cbd
commit de307f15d4
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
support/tools/TableGen/CodeEmitterGen.cpp
View File

@ -63,8 +63,8 @@ void CodeEmitterGen::createEmitter(std::ostream &o) {
for (unsigned i = 0, e = Vals.size(); i != e; ++i) { for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
if (Vals[i].getName() != "Inst" && if (Vals[i].getName() != "Inst" &&
!Vals[i].getValue()->isComplete() && !Vals[i].getValue()->isComplete() &&
/* ignore annul and predict bits since no one sets them yet */
Vals[i].getName() != "annul" && Vals[i].getName() != "annul" &&
Vals[i].getName() != "cc" &&
Vals[i].getName() != "predict") Vals[i].getName() != "predict")
{ {
o << " // op" << op << ": " << Vals[i].getName() << "\n" o << " // op" << op << ": " << Vals[i].getName() << "\n"
@ -105,6 +105,7 @@ void CodeEmitterGen::createEmitter(std::ostream &o) {
} }
} }
} else { } else {
// ignore annul and predict bits since no one sets them yet
if (Vals[f].getName() == "annul" || Vals[f].getName() == "predict") if (Vals[f].getName() == "annul" || Vals[f].getName() == "predict")
--Offset; --Offset;
} }