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Code cleanup: refactor the switch statements in the generation of reduction variables into an IR builder call.
llvm-svn: 171871
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@ -1263,6 +1263,29 @@ isTriviallyVectorizableIntrinsic(Instruction *Inst) {
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return false;
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}
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/// This function translates the reduction kind to an LLVM binary operator.
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static Instruction::BinaryOps
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getReductionBinOp(LoopVectorizationLegality::ReductionKind Kind) {
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switch (Kind) {
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case LoopVectorizationLegality::RK_IntegerAdd:
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return Instruction::Add;
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case LoopVectorizationLegality::RK_IntegerMult:
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return Instruction::Mul;
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case LoopVectorizationLegality::RK_IntegerOr:
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return Instruction::Or;
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case LoopVectorizationLegality::RK_IntegerAnd:
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return Instruction::And;
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case LoopVectorizationLegality::RK_IntegerXor:
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return Instruction::Xor;
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case LoopVectorizationLegality::RK_FloatMult:
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return Instruction::FMul;
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case LoopVectorizationLegality::RK_FloatAdd:
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return Instruction::FAdd;
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default:
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llvm_unreachable("Unknown reduction operation");
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}
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}
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void
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InnerLoopVectorizer::vectorizeLoop(LoopVectorizationLegality *Legal) {
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//===------------------------------------------------===//
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@ -1376,40 +1399,10 @@ InnerLoopVectorizer::vectorizeLoop(LoopVectorizationLegality *Legal) {
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// Reduce all of the unrolled parts into a single vector.
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Value *ReducedPartRdx = RdxParts[0];
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for (unsigned part = 1; part < UF; ++part) {
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switch (RdxDesc.Kind) {
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case LoopVectorizationLegality::RK_IntegerAdd:
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ReducedPartRdx =
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Builder.CreateAdd(RdxParts[part], ReducedPartRdx, "add.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerMult:
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ReducedPartRdx =
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Builder.CreateMul(RdxParts[part], ReducedPartRdx, "mul.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerOr:
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ReducedPartRdx =
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Builder.CreateOr(RdxParts[part], ReducedPartRdx, "or.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerAnd:
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ReducedPartRdx =
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Builder.CreateAnd(RdxParts[part], ReducedPartRdx, "and.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerXor:
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ReducedPartRdx =
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Builder.CreateXor(RdxParts[part], ReducedPartRdx, "xor.rdx");
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break;
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case LoopVectorizationLegality::RK_FloatMult:
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ReducedPartRdx =
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Builder.CreateFMul(RdxParts[part], ReducedPartRdx, "fmul.rdx");
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break;
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case LoopVectorizationLegality::RK_FloatAdd:
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ReducedPartRdx =
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Builder.CreateFAdd(RdxParts[part], ReducedPartRdx, "fadd.rdx");
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break;
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default:
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llvm_unreachable("Unknown reduction operation");
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}
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Instruction::BinaryOps Op = getReductionBinOp(RdxDesc.Kind);
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ReducedPartRdx = Builder.CreateBinOp(Op, RdxParts[part], ReducedPartRdx,
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"bin.rdx");
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}
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// VF is a power of 2 so we can emit the reduction using log2(VF) shuffles
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// and vector ops, reducing the set of values being computed by half each
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@ -1433,32 +1426,8 @@ InnerLoopVectorizer::vectorizeLoop(LoopVectorizationLegality *Legal) {
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ConstantVector::get(ShuffleMask),
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"rdx.shuf");
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// Emit the operation on the shuffled value.
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switch (RdxDesc.Kind) {
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case LoopVectorizationLegality::RK_IntegerAdd:
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TmpVec = Builder.CreateAdd(TmpVec, Shuf, "add.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerMult:
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TmpVec = Builder.CreateMul(TmpVec, Shuf, "mul.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerOr:
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TmpVec = Builder.CreateOr(TmpVec, Shuf, "or.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerAnd:
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TmpVec = Builder.CreateAnd(TmpVec, Shuf, "and.rdx");
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break;
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case LoopVectorizationLegality::RK_IntegerXor:
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TmpVec = Builder.CreateXor(TmpVec, Shuf, "xor.rdx");
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break;
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case LoopVectorizationLegality::RK_FloatMult:
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TmpVec = Builder.CreateFMul(TmpVec, Shuf, "fmul.rdx");
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break;
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case LoopVectorizationLegality::RK_FloatAdd:
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TmpVec = Builder.CreateFAdd(TmpVec, Shuf, "fadd.rdx");
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break;
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default:
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llvm_unreachable("Unknown reduction operation");
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}
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Instruction::BinaryOps Op = getReductionBinOp(RdxDesc.Kind);
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TmpVec = Builder.CreateBinOp(Op, TmpVec, Shuf, "bin.rdx");
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}
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// The result is in the first element of the vector.
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