Add an alternative rev16 pattern. We should figure out a better way to handle these complex rev patterns. rdar://9609108

llvm-svn: 133289
This commit is contained in:
Evan Cheng 2011-06-17 20:47:21 +00:00
parent 25aa04466a
commit df9192b200
3 changed files with 29 additions and 0 deletions

View File

@ -3017,6 +3017,12 @@ def REV16 : AMiscA1I<0b01101011, 0b1011, (outs GPR:$Rd), (ins GPR:$Rm),
(and (shl GPR:$Rm, (i32 8)), 0xFF000000)))))]>,
Requires<[IsARM, HasV6]>;
def : ARMV6Pat<(or (or (or (and (srl GPR:$Rm, (i32 8)), 0xFF0000),
(and (shl GPR:$Rm, (i32 8)), 0xFF000000)),
(and (srl GPR:$Rm, (i32 8)), 0xFF)),
(and (shl GPR:$Rm, (i32 8)), 0xFF00)),
(REV16 GPR:$Rm)>;
def REVSH : AMiscA1I<0b01101111, 0b1011, (outs GPR:$Rd), (ins GPR:$Rm),
IIC_iUNAr, "revsh", "\t$Rd, $Rm",
[(set GPR:$Rd,

View File

@ -2593,6 +2593,12 @@ def t2REV16 : T2I_misc<0b01, 0b01, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
(or (and (srl rGPR:$Rm, (i32 8)), 0xFF0000),
(and (shl rGPR:$Rm, (i32 8)), 0xFF000000)))))]>;
def : T2Pat<(or (or (or (and (srl rGPR:$Rm, (i32 8)), 0xFF0000),
(and (shl rGPR:$Rm, (i32 8)), 0xFF000000)),
(and (srl rGPR:$Rm, (i32 8)), 0xFF)),
(and (shl rGPR:$Rm, (i32 8)), 0xFF00)),
(t2REV16 rGPR:$Rm)>;
def t2REVSH : T2I_misc<0b01, 0b11, (outs rGPR:$Rd), (ins rGPR:$Rm), IIC_iUNAr,
"revsh", ".w\t$Rd, $Rm",
[(set rGPR:$Rd,

View File

@ -67,3 +67,20 @@ entry:
%or = or i32 %shr, %and
ret i32 %or
}
; rdar://9609108
define i32 @test6(i32 %x) nounwind readnone {
entry:
; CHECK: test6
; CHECK: rev16 r0, r0
%and = shl i32 %x, 8
%shl = and i32 %and, 65280
%and2 = lshr i32 %x, 8
%shr11 = and i32 %and2, 255
%shr5 = and i32 %and2, 16711680
%shl9 = and i32 %and, -16777216
%or = or i32 %shr5, %shl9
%or6 = or i32 %or, %shr11
%or10 = or i32 %or6, %shl
ret i32 %or10
}