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Implement spill and fill of I64Regs.
llvm-svn: 182228
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parent
f777e6d131
commit
e033165fd4
@ -40,6 +40,7 @@ SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST)
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unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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if (MI->getOpcode() == SP::LDri ||
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MI->getOpcode() == SP::LDXri ||
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MI->getOpcode() == SP::LDFri ||
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MI->getOpcode() == SP::LDDFri) {
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if (MI->getOperand(1).isFI() && MI->getOperand(2).isImm() &&
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@ -59,6 +60,7 @@ unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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if (MI->getOpcode() == SP::STri ||
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MI->getOpcode() == SP::STXri ||
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MI->getOpcode() == SP::STFri ||
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MI->getOpcode() == SP::STDFri) {
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if (MI->getOperand(0).isFI() && MI->getOperand(1).isImm() &&
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@ -303,7 +305,10 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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if (I != MBB.end()) DL = I->getDebugLoc();
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// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
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if (RC == &SP::IntRegsRegClass)
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if (RC == &SP::I64RegsRegClass)
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BuildMI(MBB, I, DL, get(SP::STXri)).addFrameIndex(FI).addImm(0)
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.addReg(SrcReg, getKillRegState(isKill));
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else if (RC == &SP::IntRegsRegClass)
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BuildMI(MBB, I, DL, get(SP::STri)).addFrameIndex(FI).addImm(0)
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.addReg(SrcReg, getKillRegState(isKill));
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else if (RC == &SP::FPRegsRegClass)
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@ -324,7 +329,9 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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DebugLoc DL;
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (RC == &SP::IntRegsRegClass)
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if (RC == &SP::I64RegsRegClass)
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BuildMI(MBB, I, DL, get(SP::LDXri), DestReg).addFrameIndex(FI).addImm(0);
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else if (RC == &SP::IntRegsRegClass)
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BuildMI(MBB, I, DL, get(SP::LDri), DestReg).addFrameIndex(FI).addImm(0);
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else if (RC == &SP::FPRegsRegClass)
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BuildMI(MBB, I, DL, get(SP::LDFri), DestReg).addFrameIndex(FI).addImm(0);
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@ -201,3 +201,11 @@ define i32 @expand_setcc(i64 %a) {
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%RV = sub i32 1, %cast2
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ret i32 %RV
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}
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; CHECK: spill_i64
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; CHECK: stx
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; CHECK: ldx
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define i64 @spill_i64(i64 %x) {
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call void asm sideeffect "", "~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{o0},~{o1},~{o2},~{o3},~{o4},~{o5},~{o7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7}"()
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ret i64 %x
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}
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