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reject things like: zext <4 x i32> %tmp to i256
llvm-svn: 63504
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408b359e6e
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@ -715,6 +715,8 @@ void Verifier::visitTruncInst(TruncInst &I) {
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Assert1(SrcTy->isIntOrIntVector(), "Trunc only operates on integer", &I);
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Assert1(DestTy->isIntOrIntVector(), "Trunc only produces integer", &I);
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Assert1(isa<VectorType>(SrcTy) == isa<VectorType>(DestTy),
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"trunc source and destination must both be a vector or neither", &I);
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Assert1(SrcBitSize > DestBitSize,"DestTy too big for Trunc", &I);
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visitInstruction(I);
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@ -728,6 +730,8 @@ void Verifier::visitZExtInst(ZExtInst &I) {
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// Get the size of the types in bits, we'll need this later
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Assert1(SrcTy->isIntOrIntVector(), "ZExt only operates on integer", &I);
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Assert1(DestTy->isIntOrIntVector(), "ZExt only produces an integer", &I);
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Assert1(isa<VectorType>(SrcTy) == isa<VectorType>(DestTy),
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"zext source and destination must both be a vector or neither", &I);
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unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
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unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
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@ -747,6 +751,8 @@ void Verifier::visitSExtInst(SExtInst &I) {
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Assert1(SrcTy->isIntOrIntVector(), "SExt only operates on integer", &I);
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Assert1(DestTy->isIntOrIntVector(), "SExt only produces an integer", &I);
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Assert1(isa<VectorType>(SrcTy) == isa<VectorType>(DestTy),
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"sext source and destination must both be a vector or neither", &I);
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Assert1(SrcBitSize < DestBitSize,"Type too small for SExt", &I);
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visitInstruction(I);
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@ -762,6 +768,8 @@ void Verifier::visitFPTruncInst(FPTruncInst &I) {
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Assert1(SrcTy->isFPOrFPVector(),"FPTrunc only operates on FP", &I);
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Assert1(DestTy->isFPOrFPVector(),"FPTrunc only produces an FP", &I);
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Assert1(isa<VectorType>(SrcTy) == isa<VectorType>(DestTy),
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"fptrunc source and destination must both be a vector or neither",&I);
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Assert1(SrcBitSize > DestBitSize,"DestTy too big for FPTrunc", &I);
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visitInstruction(I);
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@ -778,6 +786,8 @@ void Verifier::visitFPExtInst(FPExtInst &I) {
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Assert1(SrcTy->isFPOrFPVector(),"FPExt only operates on FP", &I);
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Assert1(DestTy->isFPOrFPVector(),"FPExt only produces an FP", &I);
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Assert1(isa<VectorType>(SrcTy) == isa<VectorType>(DestTy),
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"fpext source and destination must both be a vector or neither", &I);
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Assert1(SrcBitSize < DestBitSize,"DestTy too small for FPExt", &I);
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visitInstruction(I);
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