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Disable the load-shrinking optimization from looking at
anything larger than 64-bits, avoiding a crash. This should really be fixed to use APInts, though type legalization happens to help us out and we get good code on the attached testcase at least. This fixes rdar://6836460 llvm-svn: 70360
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@ -1538,19 +1538,22 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1,
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N0.getOperand(0).getNode()->hasOneUse() &&
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isa<ConstantSDNode>(N0.getOperand(1))) {
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LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
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uint64_t Mask = cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue();
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uint64_t bestMask = 0;
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unsigned bestWidth = 0, bestOffset = 0;
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if (!Lod->isVolatile() && Lod->isUnindexed()) {
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if (!Lod->isVolatile() && Lod->isUnindexed() &&
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// FIXME: This uses getZExtValue() below so it only works on i64 and
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// below.
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N0.getValueType().getSizeInBits() <= 64) {
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unsigned origWidth = N0.getValueType().getSizeInBits();
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// We can narrow (e.g.) 16-bit extending loads on 32-bit target to
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// 8 bits, but have to be careful...
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if (Lod->getExtensionType() != ISD::NON_EXTLOAD)
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origWidth = Lod->getMemoryVT().getSizeInBits();
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uint64_t Mask =cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue();
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for (unsigned width = origWidth / 2; width>=8; width /= 2) {
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uint64_t newMask = (1ULL << width) - 1;
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for (unsigned offset=0; offset<origWidth/width; offset++) {
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if ((newMask & Mask)==Mask) {
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if ((newMask & Mask) == Mask) {
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if (!TD->isLittleEndian())
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bestOffset = (origWidth/width - offset - 1) * (width/8);
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else
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16
test/CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
Normal file
16
test/CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
Normal file
@ -0,0 +1,16 @@
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; RUN: llvm-as < %s | llc
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; rdar://6836460
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define i32 @test(i128* %P) nounwind {
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entry:
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%tmp48 = load i128* %P
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%and49 = and i128 %tmp48, 18446744073709551616 ; <i128> [#uses=1]
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%tobool = icmp ne i128 %and49, 0 ; <i1> [#uses=1]
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br i1 %tobool, label %if.then50, label %if.end61
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if.then50: ; preds = %if.then20
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ret i32 1241
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if.end61: ; preds = %if.then50, %if.then20, %entry
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ret i32 123
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}
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