add support for the sparcv9-*-* target triple to turn on

64-bit sparc codegen.  Patch by Nathan Keynes!

llvm-svn: 95293
This commit is contained in:
Chris Lattner 2010-02-04 06:34:01 +00:00
parent eabd2085d7
commit e43007d443
10 changed files with 77 additions and 33 deletions

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@ -66,6 +66,7 @@ public:
ppc, // PPC: powerpc
ppc64, // PPC64: powerpc64, ppu
sparc, // Sparc: sparc
sparcv9, // Sparcv9: Sparcv9
systemz, // SystemZ: s390x
tce, // TCE (http://tce.cs.tut.fi/): tce
thumb, // Thumb: thumb, thumbv.*

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@ -33,6 +33,7 @@ const char *Triple::getArchTypeName(ArchType Kind) {
case ppc64: return "powerpc64";
case ppc: return "powerpc";
case sparc: return "sparc";
case sparcv9: return "sparcv9";
case systemz: return "s390x";
case tce: return "tce";
case thumb: return "thumb";
@ -61,6 +62,7 @@ const char *Triple::getArchTypePrefix(ArchType Kind) {
case ppc64:
case ppc: return "ppc";
case sparcv9:
case sparc: return "sparc";
case x86:
@ -127,6 +129,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
return ppc;
if (Name == "sparc")
return sparc;
if (Name == "sparcv9")
return sparcv9;
if (Name == "systemz")
return systemz;
if (Name == "tce")
@ -250,6 +254,8 @@ void Triple::Parse() const {
Arch = mipsel;
else if (ArchName == "sparc")
Arch = sparc;
else if (ArchName == "sparcv9")
Arch = sparcv9;
else if (ArchName == "s390x")
Arch = systemz;
else if (ArchName == "tce")

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@ -199,4 +199,5 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeSparcAsmPrinter() {
RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
}

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@ -29,6 +29,7 @@ namespace llvm {
FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
extern Target TheSparcTarget;
extern Target TheSparcV9Target;
} // end namespace llvm;

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@ -15,29 +15,20 @@
#include "SparcGenSubtarget.inc"
using namespace llvm;
// FIXME: temporary.
#include "llvm/Support/CommandLine.h"
namespace {
cl::opt<bool> EnableV9("enable-sparc-v9-insts", cl::Hidden,
cl::desc("Enable V9 instructions in the V8 target"));
}
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS) {
// Set the default features.
IsV9 = false;
V8DeprecatedInsts = false;
IsVIS = false;
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS,
bool is64Bit) :
IsV9(false),
V8DeprecatedInsts(false),
IsVIS(false),
Is64Bit(is64Bit) {
// Determine default and user specified characteristics
std::string CPU = "generic";
const char *CPU = "v8";
if (is64Bit) {
CPU = "v9";
IsV9 = true;
}
// FIXME: autodetect host here!
CPU = "v9"; // What is a good way to detect V9?
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
// Unless explicitly enabled, disable the V9 instructions.
if (!EnableV9)
IsV9 = false;
}

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@ -23,8 +23,10 @@ class SparcSubtarget : public TargetSubtarget {
bool IsV9;
bool V8DeprecatedInsts;
bool IsVIS;
bool Is64Bit;
public:
SparcSubtarget(const std::string &TT, const std::string &FS);
SparcSubtarget(const std::string &TT, const std::string &FS, bool is64bit);
bool isV9() const { return IsV9; }
bool isVIS() const { return IsVIS; }
@ -34,7 +36,17 @@ public:
/// subtarget options. Definition of function is auto generated by tblgen.
std::string ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
bool is64Bit() const { return Is64Bit; }
std::string getDataLayout() const {
const char *p;
if (is64Bit()) {
p = "E-p:64:64:64-i64:64:64-f64:64:64-f128:128:128-n32:64";
} else {
p = "E-p:32:32:32-i64:64:64-f64:64:64-f128:64:64-n32";
}
return std::string(p);
}
};
} // end namespace llvm

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@ -19,18 +19,22 @@ using namespace llvm;
extern "C" void LLVMInitializeSparcTarget() {
// Register the target.
RegisterTargetMachine<SparcTargetMachine> X(TheSparcTarget);
RegisterAsmInfo<SparcELFMCAsmInfo> Y(TheSparcTarget);
RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
RegisterAsmInfo<SparcELFMCAsmInfo> A(TheSparcTarget);
RegisterAsmInfo<SparcELFMCAsmInfo> B(TheSparcV9Target);
}
/// SparcTargetMachine ctor - Create an ILP32 architecture model
///
SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
const std::string &FS, bool is64bit)
: LLVMTargetMachine(T, TT),
DataLayout("E-p:32:32-f128:128:128-n32"),
Subtarget(TT, FS), TLInfo(*this), InstrInfo(Subtarget),
Subtarget(TT, FS, is64bit),
DataLayout(Subtarget.getDataLayout()),
TLInfo(*this), InstrInfo(Subtarget),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
}
@ -49,3 +53,15 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM,
PM.add(createSparcDelaySlotFillerPass(*this));
return true;
}
SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
const std::string &TT,
const std::string &FS)
: SparcTargetMachine(T, TT, FS, false) {
}
SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
const std::string &TT,
const std::string &FS)
: SparcTargetMachine(T, TT, FS, true) {
}

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@ -24,14 +24,14 @@
namespace llvm {
class SparcTargetMachine : public LLVMTargetMachine {
const TargetData DataLayout; // Calculates type size & alignment
SparcSubtarget Subtarget;
const TargetData DataLayout; // Calculates type size & alignment
SparcTargetLowering TLInfo;
SparcInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
public:
SparcTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
const std::string &FS, bool is64bit);
virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
@ -49,6 +49,22 @@ public:
virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
};
/// SparcV8TargetMachine - Sparc 32-bit target machine
///
class SparcV8TargetMachine : public SparcTargetMachine {
public:
SparcV8TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
};
/// SparcV9TargetMachine - Sparc 64-bit target machine
///
class SparcV9TargetMachine : public SparcTargetMachine {
public:
SparcV9TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
};
} // end namespace llvm
#endif

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@ -13,7 +13,9 @@
using namespace llvm;
Target llvm::TheSparcTarget;
Target llvm::TheSparcV9Target;
extern "C" void LLVMInitializeSparcTargetInfo() {
RegisterTarget<Triple::sparc> X(TheSparcTarget, "sparc", "Sparc");
RegisterTarget<Triple::sparcv9> Y(TheSparcV9Target, "sparcv9", "Sparc V9");
}

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@ -1,7 +1,5 @@
; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts
; RUN: llc < %s -march=sparc -mattr=-v9 | \
; RUN: not grep popc
; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts | grep popc
; RUN: llc < %s -march=sparc -mattr=-v9 | not grep popc
; RUN: llc < %s -march=sparcv9 -mattr=v9 | grep popc
declare i32 @llvm.ctpop.i32(i32)