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add support for the sparcv9-*-* target triple to turn on
64-bit sparc codegen. Patch by Nathan Keynes! llvm-svn: 95293
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@ -66,6 +66,7 @@ public:
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ppc, // PPC: powerpc
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ppc64, // PPC64: powerpc64, ppu
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sparc, // Sparc: sparc
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sparcv9, // Sparcv9: Sparcv9
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systemz, // SystemZ: s390x
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tce, // TCE (http://tce.cs.tut.fi/): tce
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thumb, // Thumb: thumb, thumbv.*
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@ -33,6 +33,7 @@ const char *Triple::getArchTypeName(ArchType Kind) {
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case ppc64: return "powerpc64";
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case ppc: return "powerpc";
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case sparc: return "sparc";
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case sparcv9: return "sparcv9";
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case systemz: return "s390x";
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case tce: return "tce";
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case thumb: return "thumb";
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@ -61,6 +62,7 @@ const char *Triple::getArchTypePrefix(ArchType Kind) {
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case ppc64:
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case ppc: return "ppc";
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case sparcv9:
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case sparc: return "sparc";
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case x86:
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@ -127,6 +129,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
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return ppc;
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if (Name == "sparc")
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return sparc;
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if (Name == "sparcv9")
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return sparcv9;
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if (Name == "systemz")
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return systemz;
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if (Name == "tce")
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@ -250,6 +254,8 @@ void Triple::Parse() const {
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Arch = mipsel;
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else if (ArchName == "sparc")
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Arch = sparc;
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else if (ArchName == "sparcv9")
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Arch = sparcv9;
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else if (ArchName == "s390x")
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Arch = systemz;
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else if (ArchName == "tce")
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@ -199,4 +199,5 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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// Force static initialization.
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extern "C" void LLVMInitializeSparcAsmPrinter() {
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RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
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RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
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}
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@ -29,6 +29,7 @@ namespace llvm {
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FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
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extern Target TheSparcTarget;
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extern Target TheSparcV9Target;
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} // end namespace llvm;
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@ -15,29 +15,20 @@
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#include "SparcGenSubtarget.inc"
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using namespace llvm;
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// FIXME: temporary.
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#include "llvm/Support/CommandLine.h"
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namespace {
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cl::opt<bool> EnableV9("enable-sparc-v9-insts", cl::Hidden,
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cl::desc("Enable V9 instructions in the V8 target"));
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}
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SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS) {
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// Set the default features.
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IsV9 = false;
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V8DeprecatedInsts = false;
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IsVIS = false;
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SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS,
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bool is64Bit) :
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IsV9(false),
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V8DeprecatedInsts(false),
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IsVIS(false),
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Is64Bit(is64Bit) {
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// Determine default and user specified characteristics
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std::string CPU = "generic";
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const char *CPU = "v8";
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if (is64Bit) {
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CPU = "v9";
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IsV9 = true;
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}
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// FIXME: autodetect host here!
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CPU = "v9"; // What is a good way to detect V9?
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// Parse features string.
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ParseSubtargetFeatures(FS, CPU);
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// Unless explicitly enabled, disable the V9 instructions.
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if (!EnableV9)
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IsV9 = false;
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}
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@ -23,8 +23,10 @@ class SparcSubtarget : public TargetSubtarget {
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bool IsV9;
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bool V8DeprecatedInsts;
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bool IsVIS;
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bool Is64Bit;
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public:
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SparcSubtarget(const std::string &TT, const std::string &FS);
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SparcSubtarget(const std::string &TT, const std::string &FS, bool is64bit);
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bool isV9() const { return IsV9; }
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bool isVIS() const { return IsVIS; }
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@ -34,7 +36,17 @@ public:
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/// subtarget options. Definition of function is auto generated by tblgen.
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std::string ParseSubtargetFeatures(const std::string &FS,
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const std::string &CPU);
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bool is64Bit() const { return Is64Bit; }
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std::string getDataLayout() const {
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const char *p;
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if (is64Bit()) {
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p = "E-p:64:64:64-i64:64:64-f64:64:64-f128:128:128-n32:64";
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} else {
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p = "E-p:32:32:32-i64:64:64-f64:64:64-f128:64:64-n32";
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}
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return std::string(p);
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}
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};
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} // end namespace llvm
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@ -19,18 +19,22 @@ using namespace llvm;
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extern "C" void LLVMInitializeSparcTarget() {
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// Register the target.
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RegisterTargetMachine<SparcTargetMachine> X(TheSparcTarget);
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RegisterAsmInfo<SparcELFMCAsmInfo> Y(TheSparcTarget);
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RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
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RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
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RegisterAsmInfo<SparcELFMCAsmInfo> A(TheSparcTarget);
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RegisterAsmInfo<SparcELFMCAsmInfo> B(TheSparcV9Target);
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}
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/// SparcTargetMachine ctor - Create an ILP32 architecture model
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///
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SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT,
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const std::string &FS)
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const std::string &FS, bool is64bit)
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: LLVMTargetMachine(T, TT),
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DataLayout("E-p:32:32-f128:128:128-n32"),
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Subtarget(TT, FS), TLInfo(*this), InstrInfo(Subtarget),
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Subtarget(TT, FS, is64bit),
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DataLayout(Subtarget.getDataLayout()),
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TLInfo(*this), InstrInfo(Subtarget),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
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}
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@ -49,3 +53,15 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM,
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PM.add(createSparcDelaySlotFillerPass(*this));
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return true;
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}
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SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
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const std::string &TT,
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const std::string &FS)
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: SparcTargetMachine(T, TT, FS, false) {
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}
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SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
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const std::string &TT,
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const std::string &FS)
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: SparcTargetMachine(T, TT, FS, true) {
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}
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@ -24,14 +24,14 @@
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namespace llvm {
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class SparcTargetMachine : public LLVMTargetMachine {
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const TargetData DataLayout; // Calculates type size & alignment
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SparcSubtarget Subtarget;
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const TargetData DataLayout; // Calculates type size & alignment
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SparcTargetLowering TLInfo;
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SparcInstrInfo InstrInfo;
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TargetFrameInfo FrameInfo;
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public:
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SparcTargetMachine(const Target &T, const std::string &TT,
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const std::string &FS);
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const std::string &FS, bool is64bit);
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virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
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@ -49,6 +49,22 @@ public:
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virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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};
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/// SparcV8TargetMachine - Sparc 32-bit target machine
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///
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class SparcV8TargetMachine : public SparcTargetMachine {
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public:
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SparcV8TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS);
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};
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/// SparcV9TargetMachine - Sparc 64-bit target machine
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///
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class SparcV9TargetMachine : public SparcTargetMachine {
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public:
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SparcV9TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS);
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};
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} // end namespace llvm
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#endif
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@ -13,7 +13,9 @@
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using namespace llvm;
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Target llvm::TheSparcTarget;
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Target llvm::TheSparcV9Target;
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extern "C" void LLVMInitializeSparcTargetInfo() {
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RegisterTarget<Triple::sparc> X(TheSparcTarget, "sparc", "Sparc");
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RegisterTarget<Triple::sparcv9> Y(TheSparcV9Target, "sparcv9", "Sparc V9");
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}
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@ -1,7 +1,5 @@
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; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts
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; RUN: llc < %s -march=sparc -mattr=-v9 | \
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; RUN: not grep popc
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; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts | grep popc
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; RUN: llc < %s -march=sparc -mattr=-v9 | not grep popc
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; RUN: llc < %s -march=sparcv9 -mattr=v9 | grep popc
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declare i32 @llvm.ctpop.i32(i32)
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