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Add LOAD NEGATIVE instruction

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llvm-svn: 76032
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:23:44 +00:00
parent d12e7875c9
commit e45c7cb554
1 changed files with 9 additions and 1 deletions
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10
lib/Target/SystemZ/SystemZInstrFP.td
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@ -82,7 +82,6 @@ def FNEG64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
let isTwoAddress = 1 in {
let Defs = [PSW] in {
// FIXME: Add peephole for fneg(fabs) => load negative
def FABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
"lpebr\t{$dst}",
@ -93,6 +92,15 @@ def FABS64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
[(set FP64:$dst, (fabs FP64:$src)),
(implicit PSW)]>;
def FNABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
"lnebr\t{$dst}",
[(set FP32:$dst, (fneg(fabs FP32:$src))),
(implicit PSW)]>;
def FNABS64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
"lndbr\t{$dst}",
[(set FP64:$dst, (fneg(fabs FP64:$src))),
(implicit PSW)]>;
let isCommutable = 1 in { // X = ADD Y, Z == X = ADD Z, Y
def FADD32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src1, FP32:$src2),
"aebr\t{$dst, $src2}",