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Add test for ATOM ISA SSSE3
- Remove SSE4.1 feature in other ATOM-based test cases llvm-svn: 166699
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9
test/CodeGen/X86/atom-shuf.ll
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9
test/CodeGen/X86/atom-shuf.ll
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@ -0,0 +1,9 @@
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; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=atom | FileCheck %s
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define <16 x i8> @foo(<16 x i8> %in) {
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%r = shufflevector <16 x i8> %in, <16 x i8> undef, <16 x i32> < i32 7, i32 3, i32 2, i32 11, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <16 x i8> %r
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; CHECK: foo
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; CHECK: pshufb
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; CHECK-NEXT: ret
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}
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@ -1,5 +1,5 @@
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; RUN: llc < %s -march=x86 -mcpu=generic -mattr=sse41 | FileCheck %s
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; RUN: llc < %s -march=x86 -mcpu=atom -mattr=+sse41 | FileCheck -check-prefix=ATOM %s
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; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck -check-prefix=ATOM %s
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; Transpose example using the more generic vector shuffle. Return float8
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; instead of float16
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@ -47,8 +47,8 @@ entry:
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; CHECK: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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; ATOM: lo_hi_shift
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; ATOM: movhps ([[BASEREG:%[a-z]+]]),
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; ATOM: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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; ATOM: extractps ${{[0-9]+}}, %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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; ATOM: movd %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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; ATOM: movd %xmm{{[0-9]+}}, {{[0-9]*}}([[BASEREG]])
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%v.i = bitcast float* %y to <4 x float>*
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%0 = load <4 x float>* %v.i, align 1
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%1 = bitcast float* %x to <1 x i64>*
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@ -1,5 +1,5 @@
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; RUN: llc -march=x86 -mcpu=generic -mattr=+sse42 < %s | FileCheck %s
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; RUN: llc -march=x86 -mcpu=atom -mattr=+sse42 < %s | FileCheck -check-prefix=ATOM %s
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; RUN: llc -march=x86 -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
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; CHECK: paddd
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; CHECK: movl
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