mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-08 13:26:19 +00:00
Fix return type for X86 mpsadbw instrinsic. The instruction takes in a vector of 8-bit integers, but produces a vector of 16-bit integers.
llvm-svn: 143313
This commit is contained in:
parent
8282fc9e3b
commit
e77289b243
@ -919,7 +919,7 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
|
||||
// Vector sum of absolute differences
|
||||
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
|
||||
def int_x86_sse41_mpsadbw : GCCBuiltin<"__builtin_ia32_mpsadbw128">,
|
||||
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty,llvm_i32_ty],
|
||||
Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty, llvm_v16i8_ty,llvm_i32_ty],
|
||||
[IntrNoMem, Commutative]>;
|
||||
}
|
||||
|
||||
|
@ -964,12 +964,12 @@ define <2 x i64> @test_x86_sse41_movntdqa(i8* %a0) {
|
||||
declare <2 x i64> @llvm.x86.sse41.movntdqa(i8*) nounwind readonly
|
||||
|
||||
|
||||
define <16 x i8> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) {
|
||||
define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) {
|
||||
; CHECK: vmpsadbw
|
||||
%res = call <16 x i8> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i32 7) ; <<16 x i8>> [#uses=1]
|
||||
ret <16 x i8> %res
|
||||
%res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i32 7) ; <<8 x i16>> [#uses=1]
|
||||
ret <8 x i16> %res
|
||||
}
|
||||
declare <16 x i8> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i32) nounwind readnone
|
||||
declare <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i32) nounwind readnone
|
||||
|
||||
|
||||
define <8 x i16> @test_x86_sse41_packusdw(<4 x i32> %a0, <4 x i32> %a1) {
|
||||
|
Loading…
x
Reference in New Issue
Block a user