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[llvm-exegesis] InMemoryAssembler: handle return-less targets (e.g. arm).
Summary: Arm does not have a ret code per se. Reviewers: gchatelet Subscribers: mgorny, javed.absar, kristof.beyls, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D45672 llvm-svn: 332331
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@ -19,6 +19,7 @@ llvm_map_components_to_libnames(libs
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CodeGen
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Core
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ExecutionEngine
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GlobalISel
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MC
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MCJIT
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Object
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@ -10,6 +10,8 @@
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#include "InMemoryAssembler.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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@ -139,9 +141,15 @@ static void fillMachineFunction(llvm::MachineFunction &MF,
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}
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}
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}
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// Adding the Return Opcode.
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// Insert the return code.
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const llvm::TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
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llvm::BuildMI(MBB, DL, TII->get(TII->getReturnOpcode()));
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if (TII->getReturnOpcode() < TII->getNumOpcodes()) {
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llvm::BuildMI(MBB, DL, TII->get(TII->getReturnOpcode()));
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} else {
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llvm::MachineIRBuilder MIB(MF);
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MIB.setMBB(*MBB);
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MF.getSubtarget().getCallLowering()->lowerReturn(MIB, nullptr, 0);
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}
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}
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namespace {
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20
unittests/tools/llvm-exegesis/ARM/CMakeLists.txt
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20
unittests/tools/llvm-exegesis/ARM/CMakeLists.txt
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@ -0,0 +1,20 @@
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include_directories(
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${LLVM_MAIN_SRC_DIR}/lib/Target/ARM
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${LLVM_BINARY_DIR}/lib/Target/ARM
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${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib
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)
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set(LLVM_LINK_COMPONENTS
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MC
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MCParser
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Object
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Support
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Symbolize
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ARM
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)
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add_llvm_unittest(LLVMExegesisARMTests
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InMemoryAssemblerTest.cpp
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)
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target_link_libraries(LLVMExegesisARMTests PRIVATE LLVMExegesis)
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79
unittests/tools/llvm-exegesis/ARM/InMemoryAssemblerTest.cpp
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79
unittests/tools/llvm-exegesis/ARM/InMemoryAssemblerTest.cpp
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@ -0,0 +1,79 @@
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//===-- InMemoryAssemblerTest.cpp -------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "InMemoryAssembler.h"
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#include "ARMInstrInfo.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/MC/MCInstBuilder.h"
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#include "llvm/Support/Host.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "gmock/gmock.h"
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#include "gtest/gtest.h"
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#include <memory>
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namespace exegesis {
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namespace {
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using llvm::MCInstBuilder;
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using testing::ElementsAre;
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class MachineFunctionGeneratorTest : public ::testing::Test {
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protected:
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MachineFunctionGeneratorTest()
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: TT("armv7-none-linux-gnueabi"), CpuName("") {}
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static void SetUpTestCase() {
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LLVMInitializeARMTargetInfo();
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LLVMInitializeARMTargetMC();
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LLVMInitializeARMTarget();
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LLVMInitializeARMAsmPrinter();
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}
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std::unique_ptr<llvm::LLVMTargetMachine> createTargetMachine() {
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std::string Error;
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const llvm::Target *TheTarget =
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llvm::TargetRegistry::lookupTarget(TT, Error);
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assert(TheTarget);
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const llvm::TargetOptions Options;
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return std::unique_ptr<llvm::LLVMTargetMachine>(
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static_cast<llvm::LLVMTargetMachine *>(TheTarget->createTargetMachine(
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TT, CpuName, "", Options, llvm::Reloc::Model::Static)));
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}
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private:
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const std::string TT;
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const std::string CpuName;
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};
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TEST_F(MachineFunctionGeneratorTest, JitFunction) {
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JitFunctionContext Context(createTargetMachine());
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JitFunction Function(std::move(Context), {});
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ASSERT_THAT(Function.getFunctionBytes().str(),
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ElementsAre(0x1e, 0xff, 0x2f, 0xe1));
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}
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TEST_F(MachineFunctionGeneratorTest, JitFunctionADDrr) {
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JitFunctionContext Context(createTargetMachine());
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JitFunction Function(std::move(Context), {MCInstBuilder(llvm::ARM::ADDrr)
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.addReg(llvm::ARM::R0)
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.addReg(llvm::ARM::R0)
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.addReg(llvm::ARM::R0)
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.addImm(llvm::ARMCC::AL)
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.addReg(0)
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.addReg(0)});
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ASSERT_THAT(Function.getFunctionBytes().str(),
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ElementsAre(0x00, 0x00, 0x80, 0xe0, 0x1e, 0xff, 0x2f, 0xe1));
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}
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} // namespace
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} // namespace exegesis
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@ -23,7 +23,8 @@ if(LLVM_ENABLE_LIBPFM AND HAVE_LIBPFM)
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endif()
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if(LLVM_TARGETS_TO_BUILD MATCHES "X86")
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add_subdirectory(
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X86
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)
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add_subdirectory(X86)
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endif()
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if(LLVM_TARGETS_TO_BUILD MATCHES "ARM")
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add_subdirectory(ARM)
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endif()
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