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AArch64/ARM64: support relocated ADR instruction
llvm-svn: 207109
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@ -67,7 +67,8 @@ unsigned ARM64ELFObjectWriter::GetRelocType(const MCValue &Target,
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case FK_Data_8:
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return ELF::R_AARCH64_PREL64;
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case ARM64::fixup_arm64_pcrel_adr_imm21:
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llvm_unreachable("No ELF relocations supported for ADR at the moment");
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assert(SymLoc == ARM64MCExpr::VK_NONE && "unexpected ADR relocation");
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return ELF::R_AARCH64_ADR_PREL_LO21;
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case ARM64::fixup_arm64_pcrel_adrp_imm21:
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if (SymLoc == ARM64MCExpr::VK_ABS && !IsNC)
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return ELF::R_AARCH64_ADR_PREL_PG_HI21;
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@ -1,6 +1,9 @@
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// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \
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// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s
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// RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj %s -o - | \
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// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s
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adr x2, some_label
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adrp x5, some_label
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