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Look pass copies when determining whether hoisting would end up inserting more copies. rdar://9266679

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llvm-svn: 129297
This commit is contained in:
Evan Cheng 2011-04-11 21:09:18 +00:00
parent 986ec356fc
commit ea0d287a8a
2 changed files with 51 additions and 8 deletions
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25
lib/CodeGen/MachineLICM.cpp
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@ -39,7 +39,6 @@
#include "llvm/ADT/Statistic.h" #include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h" #include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h" #include "llvm/Support/raw_ostream.h"
using namespace llvm; using namespace llvm;
STATISTIC(NumHoisted, STATISTIC(NumHoisted,
@ -169,6 +168,10 @@ namespace {
/// ///
bool IsLoopInvariantInst(MachineInstr &I); bool IsLoopInvariantInst(MachineInstr &I);
/// HasAnyPHIUse - Return true if the specified register is used by any
/// phi node.
bool HasAnyPHIUse(unsigned Reg) const;
/// HasHighOperandLatency - Compute operand latency between a def of 'Reg' /// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
/// and an use in the current loop, return true if the target considered /// and an use in the current loop, return true if the target considered
/// it 'high'. /// it 'high'.
@ -758,18 +761,25 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
} }
/// HasPHIUses - Return true if the specified register has any PHI use. /// HasAnyPHIUse - Return true if the specified register is used by any
static bool HasPHIUses(unsigned Reg, MachineRegisterInfo *MRI) { /// phi node.
bool MachineLICM::HasAnyPHIUse(unsigned Reg) const {
for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg), for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
UE = MRI->use_end(); UI != UE; ++UI) { UE = MRI->use_end(); UI != UE; ++UI) {
MachineInstr *UseMI = &*UI; MachineInstr *UseMI = &*UI;
if (UseMI->isPHI()) if (UseMI->isPHI())
return true; return true;
// Look pass copies as well.
if (UseMI->isCopy()) {
unsigned Def = UseMI->getOperand(0).getReg();
if (TargetRegisterInfo::isVirtualRegister(Def) &&
HasAnyPHIUse(Def))
return true;
}
} }
return false; return false;
} }
/// HasHighOperandLatency - Compute operand latency between a def of 'Reg' /// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
/// and an use in the current loop, return true if the target considered /// and an use in the current loop, return true if the target considered
/// it 'high'. /// it 'high'.
@ -976,14 +986,13 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
return false; return false;
} }
// If result(s) of this instruction is used by PHIs, then don't hoist it. // If result(s) of this instruction is used by PHIs outside of the loop, then
// The presence of joins makes it difficult for current register allocator // don't hoist it if the instruction because it will introduce an extra copy.
// implementation to perform remat.
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI.getOperand(i); const MachineOperand &MO = MI.getOperand(i);
if (!MO.isReg() || !MO.isDef()) if (!MO.isReg() || !MO.isDef())
continue; continue;
if (HasPHIUses(MO.getReg(), MRI)) if (HasAnyPHIUse(MO.getReg()))
return false; return false;
} }

34
test/CodeGen/ARM/2011-04-11-MachineLICMBug.ll Normal file
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@ -0,0 +1,34 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
; Overly aggressive LICM simply adds copies of constants
; rdar://9266679
define zeroext i1 @t(i32* nocapture %A, i32 %size, i32 %value) nounwind readonly ssp {
; CHECK: t:
entry:
br label %for.cond
for.cond:
%0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
%cmp = icmp ult i32 %0, %size
br i1 %cmp, label %for.body, label %return
for.body:
; CHECK: %for.body
; CHECK: movs r{{[0-9]+}}, #1
%arrayidx = getelementptr i32* %A, i32 %0
%tmp4 = load i32* %arrayidx, align 4
%cmp6 = icmp eq i32 %tmp4, %value
br i1 %cmp6, label %return, label %for.inc
; CHECK: %for.cond
; CHECK: movs r{{[0-9]+}}, #0
for.inc:
%inc = add i32 %0, 1
br label %for.cond
return:
%retval.0 = phi i1 [ true, %for.body ], [ false, %for.cond ]
ret i1 %retval.0
}