[GlobalISel][AArch64] Handle tail calls with non-void return types

Just return once you emit the call, which is exactly what SelectionDAG does in
this situation.

Update call-translator-tail-call.ll.

Also update dllimport.ll to show that we tail call here in GISel again. Add
-verify-machineinstrs to the GISel line too, to defend against verifier
failures.

Differential revision: https://reviews.llvm.org/D67282

llvm-svn: 371425
This commit is contained in:
Jessica Paquette 2019-09-09 17:15:56 +00:00
parent 5704af1ce4
commit eac56ff11a
3 changed files with 12 additions and 23 deletions

View File

@ -450,14 +450,6 @@ bool AArch64CallLowering::isEligibleForTailCallOptimization(
return false;
}
if (!Info.OrigRet.Ty->isVoidTy()) {
// TODO: lowerCall will insert COPYs to handle the call's return value.
// This needs some refactoring to avoid this with tail call returns. For
// now, just don't handle that case.
LLVM_DEBUG(dbgs() << "... Cannot handle non-void return types yet.\n");
return false;
}
if (!mayTailCallThisCC(CalleeCC)) {
LLVM_DEBUG(dbgs() << "... Calling convention cannot be tail called.\n");
return false;
@ -649,6 +641,11 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
*MF.getSubtarget().getRegBankInfo(), *MIB, MIB->getDesc(), Info.Callee,
0));
// If we're tail calling, then we're the return from the block. So, we don't
// want to copy anything.
if (IsSibCall)
return true;
// Finally we can copy the returned value back into its virtual-register. In
// symmetry with the arugments, the physical register must be an
// implicit-define of the call instruction.
@ -668,13 +665,10 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
MIRBuilder.buildCopy(Info.SwiftErrorVReg, Register(AArch64::X21));
}
if (!IsSibCall) {
// If we aren't sibcalling, we need to move the stack.
CallSeqStart.addImm(Handler.StackSize).addImm(0);
MIRBuilder.buildInstr(AArch64::ADJCALLSTACKUP)
.addImm(Handler.StackSize)
.addImm(0);
}
CallSeqStart.addImm(Handler.StackSize).addImm(0);
MIRBuilder.buildInstr(AArch64::ADJCALLSTACKUP)
.addImm(Handler.StackSize)
.addImm(0);
return true;
}

View File

@ -47,12 +47,7 @@ declare i32 @nonvoid_ret()
define i32 @test_nonvoid_ret() {
; COMMON-LABEL: name: test_nonvoid_ret
; COMMON: bb.1 (%ir-block.0):
; COMMON: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
; COMMON: BL @nonvoid_ret, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit-def $w0
; COMMON: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; COMMON: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
; COMMON: $w0 = COPY [[COPY]](s32)
; COMMON: RET_ReallyLR implicit $w0
; COMMON: TCRETURNdi @nonvoid_ret, 0, csr_aarch64_aapcs, implicit $sp
%call = tail call i32 @nonvoid_ret()
ret i32 %call
}

View File

@ -1,6 +1,6 @@
; RUN: llc -mtriple aarch64-unknown-windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefixes=CHECK,DAG-ISEL
; RUN: llc -mtriple aarch64-unknown-windows-msvc -fast-isel -filetype asm -o - %s | FileCheck %s -check-prefixes=CHECK,FAST-ISEL
; RUN: llc -mtriple aarch64-unknown-windows-msvc -O0 -filetype asm -o - %s | FileCheck %s -check-prefixes=CHECK,GLOBAL-ISEL,GLOBAL-ISEL-FALLBACK
; RUN: llc -mtriple aarch64-unknown-windows-msvc -verify-machineinstrs -O0 -filetype asm -o - %s | FileCheck %s -check-prefixes=CHECK,GLOBAL-ISEL,GLOBAL-ISEL-FALLBACK
@var = external dllimport global i32
@ext = external global i32
@ -59,4 +59,4 @@ define i32 @call_internal() {
; CHECK-LABEL: call_internal
; DAG-ISEL: b internal
; FAST-ISEL: b internal
; GLOBAL-ISEL: bl internal
; GLOBAL-ISEL: b internal