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[DAGCombiner] Support folding (mulhs/u X, 0)->0 for vectors.

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We should probably also fold (mulhs/u X, 1) for vectors, but that's harder.

llvm-svn: 320344
This commit is contained in:
Craig Topper 2017-12-11 08:33:20 +00:00
parent f3666fdbf6
commit ec3585cfb3
2 changed files with 19 additions and 8 deletions
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16
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -3099,6 +3099,14 @@ SDValue DAGCombiner::visitMULHS(SDNode *N) {
EVT VT = N->getValueType(0);
SDLoc DL(N);
if (VT.isVector()) {
// fold (mulhs x, 0) -> 0
if (ISD::isBuildVectorAllZeros(N1.getNode()))
return N1;
if (ISD::isBuildVectorAllZeros(N0.getNode()))
return N0;
}
// fold (mulhs x, 0) -> 0
if (isNullConstant(N1))
return N1;
@ -3138,6 +3146,14 @@ SDValue DAGCombiner::visitMULHU(SDNode *N) {
EVT VT = N->getValueType(0);
SDLoc DL(N);
if (VT.isVector()) {
// fold (mulhu x, 0) -> 0
if (ISD::isBuildVectorAllZeros(N1.getNode()))
return N1;
if (ISD::isBuildVectorAllZeros(N0.getNode()))
return N0;
}
// fold (mulhu x, 0) -> 0
if (isNullConstant(N1))
return N1;

11
test/CodeGen/X86/pr34855.ll
View File

@ -8,18 +8,13 @@ define void @PR34855(<2 x i32> *%p0, <2 x i32> *%p1, <2 x i32> *%p2) {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; X86-NEXT: movlps %xmm0, (%eax)
; X86-NEXT: movsd %xmm0, (%eax)
; X86-NEXT: retl
;
; X64-LABEL: PR34855:
; X64: # %bb.0:
; X64-NEXT: movslq 4(%rdi), %rax
; X64-NEXT: movq %rax, %xmm0
; X64-NEXT: movslq (%rdi), %rax
; X64-NEXT: movq %rax, %xmm1
; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
; X64-NEXT: movq %xmm0, (%rdx)
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: movq %rax, (%rdx)
; X64-NEXT: retq
%tmp = load <2 x i32>, <2 x i32>* %p0, align 8
%tmp1 = load <2 x i32>, <2 x i32>* %p1, align 8