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[CodeGen] Allow mempcy/memset to generate small overlapping stores.
Summary: All targets either just return false here or properly model `Fast`, so I don't think there is any reason to prevent CodeGen from doing the right thing here. Subscribers: nemanjai, javed.absar, eraman, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D55365 llvm-svn: 349016
This commit is contained in:
parent
1bfe6867e2
commit
ee0b0ebdcd
@ -5491,12 +5491,10 @@ static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
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// If the new VT cannot cover all of the remaining bits, then consider
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// issuing a (or a pair of) unaligned and overlapping load / store.
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// FIXME: Only does this for 64-bit or more since we don't have proper
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// cost model for unaligned load / store.
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bool Fast;
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if (NumMemOps && AllowOverlap &&
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VTSize >= 8 && NewVTSize < Size &&
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TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && Fast)
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if (NumMemOps && AllowOverlap && NewVTSize < Size &&
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TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) &&
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Fast)
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VTSize = Size;
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else {
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VT = NewVT;
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@ -16,10 +16,8 @@
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define i32 @t0() {
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entry:
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; CHECK-LABEL: t0:
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; CHECK: ldrb [[REG0:w[0-9]+]], [x[[BASEREG:[0-9]+]], #10]
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; CHECK: strb [[REG0]], [x[[BASEREG2:[0-9]+]], #10]
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; CHECK: ldrh [[REG1:w[0-9]+]], [x[[BASEREG]], #8]
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; CHECK: strh [[REG1]], [x[[BASEREG2]], #8]
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; CHECK: ldur [[REG0:w[0-9]+]], [x[[BASEREG:[0-9]+]], #7]
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; CHECK: stur [[REG0]], [x[[BASEREG2:[0-9]+]], #7]
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; CHECK: ldr [[REG2:x[0-9]+]],
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; CHECK: str [[REG2]],
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false)
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@ -74,9 +72,9 @@ entry:
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define void @t5(i8* nocapture %C) nounwind {
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entry:
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; CHECK-LABEL: t5:
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; CHECK: strb wzr, [x0, #6]
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; CHECK: mov [[REG7:w[0-9]+]], #21587
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; CHECK: strh [[REG7]], [x0, #4]
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; CHECK: mov [[REG7:w[0-9]+]], #21337
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; CHECK: movk [[REG7]],
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; CHECK: stur [[REG7]], [x0, #3]
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; CHECK: mov [[REG8:w[0-9]+]],
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; CHECK: movk [[REG8]],
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; CHECK: str [[REG8]], [x0]
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@ -86,10 +86,9 @@ entry:
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define void @t5(i8* nocapture %C) nounwind {
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entry:
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; CHECK-LABEL: t5:
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; CHECK: movs [[REG5:r[0-9]+]], #0
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; CHECK: strb [[REG5]], [r0, #6]
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; CHECK: movw [[REG6:r[0-9]+]], #21587
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; CHECK: strh [[REG6]], [r0, #4]
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; CHECK: movw [[REG5:r[0-9]+]], #21337
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; CHECK: movt [[REG5]], #84
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; CHECK: str.w [[REG5]], [r0, #3]
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; CHECK: movw [[REG7:r[0-9]+]], #18500
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; CHECK: movt [[REG7:r[0-9]+]], #22866
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; CHECK: str [[REG7]]
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@ -34,14 +34,16 @@ entry:
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; CHECK-LABEL: t2:
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; CHECKV6: ldr [[LB:r[0-7]]],
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; CHECKV6-NEXT: ldr [[SB:r[0-7]]],
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; CHECKV6-NEXT: ldm{{(\.w)?}} [[LB]]!,
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; CHECKV6-NEXT: stm{{(\.w)?}} [[SB]]!,
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; CHECKV6-NEXT: ldrh{{(\.w)?}} {{.*}}, {{\[}}[[LB]]]
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; CHECKV6-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]], #2]
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; CHECKV6-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]], #2]
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; CHECKV6-NEXT: strh{{(\.w)?}} {{.*}}, {{\[}}[[SB]]]
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; CHECKV7: movt [[LB:[rl0-9]+]], :upper16:d
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; CHECKV7-NEXT: movt [[SB:[rl0-9]+]], :upper16:s
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; CHECK-NEXT: ldm{{(\.w)?}} [[LB]]!,
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!,
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; CHECK-NEXT: ldrh{{(\.w)?}} {{.*}}, {{\[}}[[LB]]]
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; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]], #2]
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; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]], #2]
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; CHECK-NEXT: strh{{(\.w)?}} {{.*}}, {{\[}}[[SB]]]
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; CHECKV7: ldr{{(\.w)?}} {{.*}}, {{\[}}[[LB]], #11]
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; CHECKV7-NEXT: str{{(\.w)?}} {{.*}}, {{\[}}[[SB]], #11]
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 bitcast ([64 x i32]* @s to i8*), i8* align 4 bitcast ([64 x i32]* @d to i8*), i32 15, i1 false)
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ret void
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}
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@ -34,11 +34,9 @@ entry:
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; CHECK-DAG: lwz {{[0-9]+}}, 178(1)
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; CHECK-DAG: sth {{[0-9]+}}, 70(1)
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; CHECK-DAG: stw {{[0-9]+}}, 66(1)
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; CHECK-DAG: lbz {{[0-9]+}}, 191(1)
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; CHECK-DAG: lhz {{[0-9]+}}, 189(1)
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; CHECK-DAG: lwz {{[0-9]+}}, 188(1)
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; CHECK-DAG: lwz {{[0-9]+}}, 185(1)
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; CHECK-DAG: stb {{[0-9]+}}, 79(1)
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; CHECK-DAG: sth {{[0-9]+}}, 77(1)
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; CHECK-DAG: stw {{[0-9]+}}, 76(1)
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; CHECK-DAG: stw {{[0-9]+}}, 73(1)
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; CHECK-DAG: ld 6, 72(1)
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; CHECK-DAG: ld 5, 64(1)
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@ -157,8 +157,7 @@ entry:
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; CHECK: stw {{[0-9]+}}, 147(1)
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; CHECK: sth {{[0-9]+}}, 158(1)
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; CHECK: stw {{[0-9]+}}, 154(1)
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; CHECK: stb {{[0-9]+}}, 167(1)
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; CHECK: sth {{[0-9]+}}, 165(1)
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; CHECK: stw {{[0-9]+}}, 164(1)
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; CHECK: stw {{[0-9]+}}, 161(1)
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}
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@ -148,8 +148,7 @@ entry:
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; CHECK: stw {{[0-9]+}}, 83(1)
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; CHECK: sth {{[0-9]+}}, 94(1)
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; CHECK: stw {{[0-9]+}}, 90(1)
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; CHECK: stb {{[0-9]+}}, 103(1)
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; CHECK: sth {{[0-9]+}}, 101(1)
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; CHECK: stw {{[0-9]+}}, 100(1)
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; CHECK: stw {{[0-9]+}}, 97(1)
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; CHECK: ld 9, 96(1)
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; CHECK: ld 8, 88(1)
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@ -16,8 +16,7 @@ target triple = "x86_64-unknown-linux-gnu"
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define void @foo(i8* %tmp2) {
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; X86-LABEL: foo:
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; X86: # %bb.0:
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; X86-NEXT: movb $0, 6(%rdi)
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; X86-NEXT: movw $15212, 4(%rdi) # imm = 0x3B6C
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; X86-NEXT: movl $3894379, 3(%rdi) # imm = 0x3B6C6B
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; X86-NEXT: movl $1802117222, (%rdi) # imm = 0x6B6A2066
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; X86-NEXT: retq
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp2, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @0, i64 0, i64 3), i64 7, i1 false)
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@ -51,11 +51,10 @@ define void @t4(i8* nocapture %s, i8 %a) nounwind {
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: imull $16843009, %ecx, %ecx ## imm = 0x1010101
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; CHECK-NEXT: movl %ecx, 11(%eax)
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; CHECK-NEXT: movl %ecx, 8(%eax)
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; CHECK-NEXT: movl %ecx, 4(%eax)
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; CHECK-NEXT: movl %ecx, (%eax)
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; CHECK-NEXT: movw %cx, 12(%eax)
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; CHECK-NEXT: movb %cl, 14(%eax)
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i1 false)
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@ -71,22 +71,19 @@ define void @memset_7(i8* %a) nounwind {
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; X86-LABEL: memset_7:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movb $0, 6(%eax)
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; X86-NEXT: movw $0, 4(%eax)
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; X86-NEXT: movl $0, 3(%eax)
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; X86-NEXT: movl $0, (%eax)
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; X86-NEXT: retl
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;
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; CORE2-LABEL: memset_7:
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; CORE2: # %bb.0: # %entry
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; CORE2-NEXT: movb $0, 6(%rdi)
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; CORE2-NEXT: movw $0, 4(%rdi)
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; CORE2-NEXT: movl $0, 3(%rdi)
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; CORE2-NEXT: movl $0, (%rdi)
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; CORE2-NEXT: retq
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;
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; NEHALEM-LABEL: memset_7:
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; NEHALEM: # %bb.0: # %entry
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; NEHALEM-NEXT: movb $0, 6(%rdi)
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; NEHALEM-NEXT: movw $0, 4(%rdi)
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; NEHALEM-NEXT: movl $0, 3(%rdi)
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; NEHALEM-NEXT: movl $0, (%rdi)
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; NEHALEM-NEXT: retq
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entry:
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@ -120,23 +117,20 @@ define void @memset_11(i8* %a) nounwind {
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; X86-LABEL: memset_11:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movb $0, 10(%eax)
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; X86-NEXT: movw $0, 8(%eax)
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; X86-NEXT: movl $0, 7(%eax)
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; X86-NEXT: movl $0, 4(%eax)
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; X86-NEXT: movl $0, (%eax)
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; X86-NEXT: retl
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;
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; CORE2-LABEL: memset_11:
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; CORE2: # %bb.0: # %entry
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; CORE2-NEXT: movb $0, 10(%rdi)
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; CORE2-NEXT: movw $0, 8(%rdi)
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; CORE2-NEXT: movl $0, 7(%rdi)
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; CORE2-NEXT: movq $0, (%rdi)
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; CORE2-NEXT: retq
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;
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; NEHALEM-LABEL: memset_11:
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; NEHALEM: # %bb.0: # %entry
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; NEHALEM-NEXT: movb $0, 10(%rdi)
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; NEHALEM-NEXT: movw $0, 8(%rdi)
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; NEHALEM-NEXT: movl $0, 7(%rdi)
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; NEHALEM-NEXT: movq $0, (%rdi)
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; NEHALEM-NEXT: retq
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entry:
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@ -174,8 +168,7 @@ define void @memset_15(i8* %a) nounwind {
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; X86-LABEL: memset_15:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movb $0, 14(%eax)
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; X86-NEXT: movw $0, 12(%eax)
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; X86-NEXT: movl $0, 11(%eax)
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; X86-NEXT: movl $0, 8(%eax)
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; X86-NEXT: movl $0, 4(%eax)
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; X86-NEXT: movl $0, (%eax)
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@ -256,8 +249,7 @@ define void @memset_19(i8* %a) nounwind {
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; X86-LABEL: memset_19:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movb $0, 18(%eax)
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; X86-NEXT: movw $0, 16(%eax)
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; X86-NEXT: movl $0, 15(%eax)
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; X86-NEXT: movl $0, 12(%eax)
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; X86-NEXT: movl $0, 8(%eax)
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; X86-NEXT: movl $0, 4(%eax)
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@ -266,8 +258,7 @@ define void @memset_19(i8* %a) nounwind {
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;
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; CORE2-LABEL: memset_19:
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; CORE2: # %bb.0: # %entry
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; CORE2-NEXT: movb $0, 18(%rdi)
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; CORE2-NEXT: movw $0, 16(%rdi)
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; CORE2-NEXT: movl $0, 15(%rdi)
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; CORE2-NEXT: movq $0, 8(%rdi)
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; CORE2-NEXT: movq $0, (%rdi)
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; CORE2-NEXT: retq
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@ -276,8 +267,7 @@ define void @memset_19(i8* %a) nounwind {
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; NEHALEM: # %bb.0: # %entry
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; NEHALEM-NEXT: xorps %xmm0, %xmm0
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; NEHALEM-NEXT: movups %xmm0, (%rdi)
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; NEHALEM-NEXT: movb $0, 18(%rdi)
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; NEHALEM-NEXT: movw $0, 16(%rdi)
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; NEHALEM-NEXT: movl $0, 15(%rdi)
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; NEHALEM-NEXT: retq
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entry:
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call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 19, i1 false)
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@ -288,8 +278,7 @@ define void @memset_31(i8* %a) nounwind {
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; X86-LABEL: memset_31:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movb $0, 30(%eax)
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; X86-NEXT: movw $0, 28(%eax)
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; X86-NEXT: movl $0, 27(%eax)
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; X86-NEXT: movl $0, 24(%eax)
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; X86-NEXT: movl $0, 20(%eax)
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; X86-NEXT: movl $0, 16(%eax)
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@ -322,8 +311,7 @@ define void @memset_35(i8* %a) nounwind {
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; X86-LABEL: memset_35:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movb $0, 34(%eax)
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; X86-NEXT: movw $0, 32(%eax)
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; X86-NEXT: movl $0, 31(%eax)
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; X86-NEXT: movl $0, 28(%eax)
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; X86-NEXT: movl $0, 24(%eax)
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; X86-NEXT: movl $0, 20(%eax)
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@ -336,8 +324,7 @@ define void @memset_35(i8* %a) nounwind {
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;
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; CORE2-LABEL: memset_35:
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; CORE2: # %bb.0: # %entry
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; CORE2-NEXT: movb $0, 34(%rdi)
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; CORE2-NEXT: movw $0, 32(%rdi)
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; CORE2-NEXT: movl $0, 31(%rdi)
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; CORE2-NEXT: movq $0, 24(%rdi)
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; CORE2-NEXT: movq $0, 16(%rdi)
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; CORE2-NEXT: movq $0, 8(%rdi)
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@ -349,8 +336,7 @@ define void @memset_35(i8* %a) nounwind {
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; NEHALEM-NEXT: xorps %xmm0, %xmm0
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; NEHALEM-NEXT: movups %xmm0, 16(%rdi)
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; NEHALEM-NEXT: movups %xmm0, (%rdi)
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; NEHALEM-NEXT: movb $0, 34(%rdi)
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; NEHALEM-NEXT: movw $0, 32(%rdi)
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; NEHALEM-NEXT: movl $0, 31(%rdi)
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; NEHALEM-NEXT: retq
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entry:
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call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 35, i1 false)
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@ -6,21 +6,23 @@
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@.str1 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 8
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@.str3 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, 2'ND STRING\00", align 8
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; This can be improved; see PR39952.
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define void @func() nounwind ssp {
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; I386-LABEL: func:
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; I386: ## %bb.0: ## %entry
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; I386-NEXT: pushl %esi
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; I386-NEXT: subl $40, %esp
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; I386-NEXT: leal {{[0-9]+}}(%esp), %esi
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; I386-NEXT: subl $32, %esp
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; I386-NEXT: .p2align 4, 0x90
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; I386-NEXT: LBB0_1: ## %bb
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; I386-NEXT: ## =>This Inner Loop Header: Depth=1
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; I386-NEXT: subl $4, %esp
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; I386-NEXT: pushl $31
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; I386-NEXT: pushl $_.str3
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; I386-NEXT: pushl %esi
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; I386-NEXT: calll _memcpy
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; I386-NEXT: addl $16, %esp
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; I386-NEXT: movl $4673097, {{[0-9]+}}(%esp) ## imm = 0x474E49
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; I386-NEXT: movl $1230132307, {{[0-9]+}}(%esp) ## imm = 0x49525453
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; I386-NEXT: movl $541347367, {{[0-9]+}}(%esp) ## imm = 0x20444E27
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; I386-NEXT: movl $840969293, {{[0-9]+}}(%esp) ## imm = 0x32202C4D
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; I386-NEXT: movl $1095911247, {{[0-9]+}}(%esp) ## imm = 0x4152474F
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; I386-NEXT: movl $1380982853, {{[0-9]+}}(%esp) ## imm = 0x52502045
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; I386-NEXT: movl $1313821779, {{[0-9]+}}(%esp) ## imm = 0x4E4F5453
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; I386-NEXT: movl $1498564676, (%esp) ## imm = 0x59524844
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; I386-NEXT: jmp LBB0_1
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;
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; CORE2-LABEL: func:
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@ -61,4 +63,57 @@ return: ; No predecessors!
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ret void
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}
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define void @func_aligned() nounwind ssp {
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; I386-LABEL: func_aligned:
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; I386: ## %bb.0: ## %entry
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; I386-NEXT: subl $44, %esp
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; I386-NEXT: movaps {{.*#+}} xmm0 = [1498564676,1313821779,1380982853,1095911247]
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; I386-NEXT: .p2align 4, 0x90
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; I386-NEXT: LBB1_1: ## %bb
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; I386-NEXT: ## =>This Inner Loop Header: Depth=1
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; I386-NEXT: movaps %xmm0, (%esp)
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; I386-NEXT: movl $4673097, {{[0-9]+}}(%esp) ## imm = 0x474E49
|
||||
; I386-NEXT: movl $1230132307, {{[0-9]+}}(%esp) ## imm = 0x49525453
|
||||
; I386-NEXT: movl $541347367, {{[0-9]+}}(%esp) ## imm = 0x20444E27
|
||||
; I386-NEXT: movl $840969293, {{[0-9]+}}(%esp) ## imm = 0x32202C4D
|
||||
; I386-NEXT: jmp LBB1_1
|
||||
;
|
||||
; CORE2-LABEL: func_aligned:
|
||||
; CORE2: ## %bb.0: ## %entry
|
||||
; CORE2-NEXT: movabsq $20070800167293728, %rax ## imm = 0x474E4952545320
|
||||
; CORE2-NEXT: movabsq $2325069237881678925, %rcx ## imm = 0x20444E2732202C4D
|
||||
; CORE2-NEXT: movabsq $4706902966564560965, %rdx ## imm = 0x4152474F52502045
|
||||
; CORE2-NEXT: movabsq $5642821575076104260, %rsi ## imm = 0x4E4F545359524844
|
||||
; CORE2-NEXT: .p2align 4, 0x90
|
||||
; CORE2-NEXT: LBB1_1: ## %bb
|
||||
; CORE2-NEXT: ## =>This Inner Loop Header: Depth=1
|
||||
; CORE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
|
||||
; CORE2-NEXT: movq %rcx, -{{[0-9]+}}(%rsp)
|
||||
; CORE2-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)
|
||||
; CORE2-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
|
||||
; CORE2-NEXT: jmp LBB1_1
|
||||
;
|
||||
; COREI7-LABEL: func_aligned:
|
||||
; COREI7: ## %bb.0: ## %entry
|
||||
; COREI7-NEXT: movups _.str3+{{.*}}(%rip), %xmm0
|
||||
; COREI7-NEXT: movups {{.*}}(%rip), %xmm1
|
||||
; COREI7-NEXT: .p2align 4, 0x90
|
||||
; COREI7-NEXT: LBB1_1: ## %bb
|
||||
; COREI7-NEXT: ## =>This Inner Loop Header: Depth=1
|
||||
; COREI7-NEXT: movups %xmm0, -{{[0-9]+}}(%rsp)
|
||||
; COREI7-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
|
||||
; COREI7-NEXT: jmp LBB1_1
|
||||
entry:
|
||||
%String2Loc = alloca [31 x i8], align 16
|
||||
br label %bb
|
||||
|
||||
bb: ; preds = %bb, %entry
|
||||
%String2Loc9 = getelementptr inbounds [31 x i8], [31 x i8]* %String2Loc, i64 0, i64 0
|
||||
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str3, i64 0, i64 0), i64 31, i1 false)
|
||||
br label %bb
|
||||
|
||||
return: ; No predecessors!
|
||||
ret void
|
||||
}
|
||||
|
||||
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
|
||||
|
Loading…
Reference in New Issue
Block a user