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[mips] [IAS] Fix error messages for using LI with 64-bit immediates.

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Summary:
LI should never accept immediates larger than 32 bits.
The additional Is32BitImm boolean also paves the way for unifying the functionality that LA and LI have in common.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9289

llvm-svn: 236313
This commit is contained in:
Toma Tabacu 2015-05-01 12:19:27 +00:00
parent 1fd7063a03
commit f00cf4968b
2 changed files with 19 additions and 15 deletions
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25
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -179,7 +179,7 @@ class MipsAsmParser : public MCTargetAsmParser {
bool expandJalWithRegs(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
bool expandLoadImm(MCInst &Inst, SMLoc IDLoc,
bool expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
bool expandLoadAddressImm(MCInst &Inst, SMLoc IDLoc,
@ -1609,13 +1609,9 @@ bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,
switch (Inst.getOpcode()) {
default: llvm_unreachable("unimplemented expansion");
case Mips::LoadImm32:
return expandLoadImm(Inst, IDLoc, Instructions);
return expandLoadImm(Inst, true, IDLoc, Instructions);
case Mips::LoadImm64:
if (!isGP64bit()) {
Error(IDLoc, "instruction requires a 64-bit architecture");
return true;
}
return expandLoadImm(Inst, IDLoc, Instructions);
return expandLoadImm(Inst, false, IDLoc, Instructions);
case Mips::LoadAddrImm32:
return expandLoadAddressImm(Inst, IDLoc, Instructions);
case Mips::LoadAddrReg32:
@ -1715,8 +1711,13 @@ bool MipsAsmParser::expandJalWithRegs(MCInst &Inst, SMLoc IDLoc,
return false;
}
bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
bool MipsAsmParser::expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) {
if (!Is32BitImm && !isGP64bit()) {
Error(IDLoc, "instruction requires a 64-bit architecture");
return true;
}
MCInst tmpInst;
const MCOperand &ImmOp = Inst.getOperand(1);
assert(ImmOp.isImm() && "expected immediate operand kind");
@ -1757,8 +1758,8 @@ bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
Instructions.push_back(tmpInst);
createLShiftOri<0>(Bits15To0, Reg, IDLoc, Instructions);
} else if ((ImmValue & (0xffffLL << 48)) == 0) {
if (!isGP64bit()) {
Error(IDLoc, "instruction requires a 64-bit architecture");
if (Is32BitImm) {
Error(IDLoc, "instruction requires a 32-bit immediate");
return true;
}
@ -1786,8 +1787,8 @@ bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
createLShiftOri<0>(Bits31To16, Reg, IDLoc, Instructions);
createLShiftOri<16>(Bits15To0, Reg, IDLoc, Instructions);
} else {
if (!isGP64bit()) {
Error(IDLoc, "instruction requires a 64-bit architecture");
if (Is32BitImm) {
Error(IDLoc, "instruction requires a 32-bit immediate");
return true;
}

9
test/MC/Mips/mips-expansions-bad.s
View File

@ -1,8 +1,11 @@
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
# RUN: FileCheck %s < %t1
# RUN: FileCheck %s < %t1 --check-prefix=32-BIT
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 2>&1 | \
# RUN: FileCheck %s --check-prefix=64-BIT
.text
li $5, 0x100000000
# CHECK: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
# 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
# 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate
dli $5, 1
# CHECK: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
# 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture