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cmpps / cmppd encoding bug
llvm-svn: 27393
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a1fc0eb694
commit
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@ -963,22 +963,22 @@ def ANDNPDrm : PDI<0x55, MRMSrcMem, (ops VR128:$dst, VR128:$src1,f128mem:$src2),
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}
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}
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let isTwoAddress = 1 in {
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let isTwoAddress = 1 in {
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def CMPPSrr : PSI<0xC2, MRMSrcReg,
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def CMPPSrr : PSIi8<0xC2, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}ps {$src, $dst|$dst, $src}",
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"cmp${cc}ps {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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VR128:$src, imm:$cc))]>;
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VR128:$src, imm:$cc))]>;
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def CMPPSrm : PSI<0xC2, MRMSrcMem,
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def CMPPSrm : PSIi8<0xC2, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}ps {$src, $dst|$dst, $src}",
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"cmp${cc}ps {$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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(load addr:$src), imm:$cc))]>;
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(load addr:$src), imm:$cc))]>;
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def CMPPDrr : PDI<0xC2, MRMSrcReg,
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def CMPPDrr : PDIi8<0xC2, MRMSrcReg,
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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(ops VR128:$dst, VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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def CMPPDrm : PDI<0xC2, MRMSrcMem,
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def CMPPDrm : PDIi8<0xC2, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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(ops VR128:$dst, VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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"cmp${cc}pd {$src, $dst|$dst, $src}", []>;
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}
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}
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// Shuffle and unpack instructions
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// Shuffle and unpack instructions
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