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Fix spelling.
llvm-svn: 97447
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@ -848,7 +848,7 @@ define i32 @main() { <i>; i32()* </i>
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<div class="doc_text">
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<p>LLVM function definitions consist of the "<tt>define</tt>" keyord, an
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<p>LLVM function definitions consist of the "<tt>define</tt>" keyword, an
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optional <a href="#linkage">linkage type</a>, an optional
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<a href="#visibility">visibility style</a>, an optional
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<a href="#callingconv">calling convention</a>, a return type, an optional
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@ -4104,11 +4104,11 @@ Instruction</a> </div>
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<p>The optional <tt>!nontemporal</tt> metadata must reference a single
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metatadata name <index> corresponding to a metadata node with
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one <tt>i32</tt> entry of value 1. The existance of
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one <tt>i32</tt> entry of value 1. The existence of
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the <tt>!nontemporal</tt> metatadata on the instruction tells the optimizer
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and code generator that this load is not expected to be reused in the cache.
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The code generator may select special instructions to save cache bandwidth,
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such as the <tt>MOVNT</tt> intruction on x86.</p>
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such as the <tt>MOVNT</tt> instruction on x86.</p>
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<h5>Semantics:</h5>
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<p>The location of memory pointed to is loaded. If the value being loaded is of
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@ -4164,11 +4164,11 @@ Instruction</a> </div>
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<p>The optional !nontemporal metadata must reference a single metatadata
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name <index> corresponding to a metadata node with one i32 entry of
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value 1. The existance of the !nontemporal metatadata on the
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value 1. The existence of the !nontemporal metatadata on the
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instruction tells the optimizer and code generator that this load is
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not expected to be reused in the cache. The code generator may
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select special instructions to save cache bandwidth, such as the
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MOVNT intruction on x86.</p>
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MOVNT instruction on x86.</p>
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<h5>Semantics:</h5>
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@ -4964,7 +4964,7 @@ entry:
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<tt>op1</tt> is equal to <tt>op2</tt>.</li>
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<li><tt>ogt</tt>: yields <tt>true</tt> if both operands are not a QNAN and
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<tt>op1</tt> is greather than <tt>op2</tt>.</li>
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<tt>op1</tt> is greater than <tt>op2</tt>.</li>
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<li><tt>oge</tt>: yields <tt>true</tt> if both operands are not a QNAN and
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<tt>op1</tt> is greater than or equal to <tt>op2</tt>.</li>
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@ -5209,7 +5209,7 @@ Loop: ; Infinite loop that counts from 0 on up...
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standard C99 library as being the C99 library functions, and may perform
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optimizations or generate code for them under that assumption. This is
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something we'd like to change in the future to provide better support for
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freestanding environments and non-C-based langauges.</p>
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freestanding environments and non-C-based languages.</p>
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</div>
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@ -5765,7 +5765,7 @@ LLVM</a>.</p>
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<h5>Semantics:</h5>
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<p>This intrinsic does not modify the behavior of the program. Backends that do
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not support this intrinisic may ignore it.</p>
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not support this intrinsic may ignore it.</p>
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</div>
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@ -5845,7 +5845,7 @@ LLVM</a>.</p>
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number of bytes to copy, and the fourth argument is the alignment of the
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source and destination locations.</p>
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<p>If the call to this intrinisic has an alignment value that is not 0 or 1,
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<p>If the call to this intrinsic has an alignment value that is not 0 or 1,
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then the caller guarantees that both the source and destination pointers are
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aligned to that boundary.</p>
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@ -5895,7 +5895,7 @@ LLVM</a>.</p>
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number of bytes to copy, and the fourth argument is the alignment of the
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source and destination locations.</p>
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<p>If the call to this intrinisic has an alignment value that is not 0 or 1,
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<p>If the call to this intrinsic has an alignment value that is not 0 or 1,
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then the caller guarantees that the source and destination pointers are
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aligned to that boundary.</p>
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@ -5943,7 +5943,7 @@ LLVM</a>.</p>
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specifying the number of bytes to fill, and the fourth argument is the known
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alignment of destination location.</p>
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<p>If the call to this intrinisic has an alignment value that is not 0 or 1,
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<p>If the call to this intrinsic has an alignment value that is not 0 or 1,
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then the caller guarantees that the destination pointer is aligned to that
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boundary.</p>
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@ -6714,7 +6714,7 @@ LLVM</a>.</p>
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<h5>Arguments:</h5>
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<p>The <tt>llvm.memory.barrier</tt> intrinsic requires five boolean arguments.
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The first four arguments enables a specific barrier as listed below. The
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fith argument specifies that the barrier applies to io or device or uncached
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fifth argument specifies that the barrier applies to io or device or uncached
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memory.</p>
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<ul>
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