RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-15 16:07:49 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8

Browse Source 
immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.

llvm-svn: 155440
This commit is contained in:
Nadav Rotem 2012-04-24 11:27:53 +00:00
parent 543457a8c8
commit f2756d7e7f
1 changed files with 0 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/X86/X86ISelLowering.cpp
View File

@ -5443,12 +5443,6 @@ static SDValue LowerVECTOR_SHUFFLEtoBlend(ShuffleVectorSDNode *SVOp,
ISDNo = X86ISD::BLENDPD;
OpTy = MVT::v4f64;
break;
case MVT::v16i16:
if (!Subtarget->hasAVX2())
return SDValue();
ISDNo = X86ISD::BLENDPW;
OpTy = MVT::v16i16;
break;
}
assert(ISDNo && "Invalid Op Number");