mirror of
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Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes don't modify the LLVM IR CFG, they may modify the MachineFunction CFG, and passes like MachineLoop are registered with isCFGOnly set to true. llvm-svn: 77691
This commit is contained in:
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dd53131aee
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@ -34,6 +34,7 @@ public:
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &mf);
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@ -67,7 +67,7 @@ struct MachineFunctionInfo {
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};
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class MachineFunction : private Annotation {
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const Function *Fn;
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Function *Fn;
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const TargetMachine &Target;
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// RegInfo - Information about each register in use in the function.
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@ -115,12 +115,12 @@ class MachineFunction : private Annotation {
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unsigned Alignment;
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public:
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MachineFunction(const Function *Fn, const TargetMachine &TM);
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MachineFunction(Function *Fn, const TargetMachine &TM);
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~MachineFunction();
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/// getFunction - Return the LLVM function that this machine code represents
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///
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const Function *getFunction() const { return Fn; }
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Function *getFunction() const { return Fn; }
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/// getTarget - Return the target machine this machine code is compiled with
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///
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@ -229,21 +229,6 @@ public:
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///
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void dump() const;
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/// construct - Allocate and initialize a MachineFunction for a given Function
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/// and Target
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///
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static MachineFunction& construct(const Function *F, const TargetMachine &TM);
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/// destruct - Destroy the MachineFunction corresponding to a given Function
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///
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static void destruct(const Function *F);
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/// get - Return a handle to a MachineFunction corresponding to the given
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/// Function. This should not be called before "construct()" for a given
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/// Function.
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///
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static MachineFunction& get(const Function *F);
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// Provide accessors for the MachineBasicBlock list...
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typedef BasicBlockListType::iterator iterator;
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typedef BasicBlockListType::const_iterator const_iterator;
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49
include/llvm/CodeGen/MachineFunctionAnalysis.h
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49
include/llvm/CodeGen/MachineFunctionAnalysis.h
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@ -0,0 +1,49 @@
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//===-- MachineFunctionAnalysis.h - Owner of MachineFunctions ----*-C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the MachineFunctionAnalysis class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINE_FUNCTION_ANALYSIS_H
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#define LLVM_CODEGEN_MACHINE_FUNCTION_ANALYSIS_H
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#include "llvm/Pass.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class MachineFunction;
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/// MachineFunctionAnalysis - This class is a Pass that manages a
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/// MachineFunction object.
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struct MachineFunctionAnalysis : public FunctionPass {
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private:
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const TargetMachine &TM;
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CodeGenOpt::Level OptLevel;
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MachineFunction *MF;
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public:
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static char ID;
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explicit MachineFunctionAnalysis(TargetMachine &tm,
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CodeGenOpt::Level OL = CodeGenOpt::Default);
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MachineFunction &getMF() const { return *MF; }
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CodeGenOpt::Level getOptLevel() const { return OptLevel; }
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private:
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virtual bool runOnFunction(Function &F);
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virtual void releaseMemory();
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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};
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} // End llvm namespace
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#endif
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@ -24,19 +24,25 @@
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namespace llvm {
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// FIXME: This pass should declare that the pass does not invalidate any LLVM
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// passes.
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struct MachineFunctionPass : public FunctionPass {
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/// MachineFunctionPass - This class adapts the FunctionPass interface to
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/// allow convenient creation of passes that operate on the MachineFunction
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/// representation. Instead of overriding runOnFunction, subclasses
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/// override runOnMachineFunction.
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class MachineFunctionPass : public FunctionPass {
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protected:
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explicit MachineFunctionPass(intptr_t ID) : FunctionPass(ID) {}
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explicit MachineFunctionPass(void *ID) : FunctionPass(ID) {}
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protected:
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/// runOnMachineFunction - This method must be overloaded to perform the
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/// desired machine code transformation or analysis.
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///
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virtual bool runOnMachineFunction(MachineFunction &MF) = 0;
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public:
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/// getAnalysisUsage - Subclasses that override getAnalysisUsage
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/// must call this.
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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private:
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bool runOnFunction(Function &F);
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};
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@ -146,11 +146,6 @@ namespace llvm {
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/// by seeing if the labels map to the same reduced label.
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FunctionPass *createDebugLabelFoldingPass();
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/// MachineCodeDeletion Pass - This pass deletes all of the machine code for
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/// the current function, which should happen after the function has been
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/// emitted to a .s file or to memory.
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FunctionPass *createMachineCodeDeleter();
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/// getRegisterAllocator - This creates an instance of the register allocator
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/// for the Sparc.
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FunctionPass *getRegisterAllocator(TargetMachine &T);
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@ -19,6 +19,7 @@
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#include "llvm/Pass.h"
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#include "llvm/Constant.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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namespace llvm {
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class FastISel;
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@ -39,7 +40,7 @@ namespace llvm {
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/// SelectionDAGISel - This is the common base class used for SelectionDAG-based
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/// pattern-matching instruction selectors.
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class SelectionDAGISel : public FunctionPass {
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class SelectionDAGISel : public MachineFunctionPass {
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public:
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const TargetMachine &TM;
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TargetLowering &TLI;
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@ -62,7 +63,7 @@ public:
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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virtual bool runOnFunction(Function &Fn);
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virtual bool runOnMachineFunction(MachineFunction &MF);
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unsigned MakeReg(MVT VT);
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@ -21,7 +21,6 @@
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#include "llvm/GlobalValue.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Argument.h"
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#include "llvm/Support/Annotation.h"
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#include "llvm/Attributes.h"
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namespace llvm {
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@ -66,7 +65,7 @@ private:
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mutable ilist_node<Argument> Sentinel;
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};
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class Function : public GlobalValue, public Annotable,
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class Function : public GlobalValue,
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public ilist_node<Function> {
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public:
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typedef iplist<Argument> ArgumentListType;
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@ -18,6 +18,7 @@
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#include "llvm/Analysis/LoopPass.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/GCStrategy.h"
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#include "llvm/CodeGen/MachineFunctionAnalysis.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/TargetRegistry.h"
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@ -118,9 +119,6 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
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PM.add(createGCInfoDeleter());
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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@ -137,9 +135,6 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
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PM.add(createGCInfoDeleter());
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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@ -156,9 +151,6 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
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PM.add(createGCInfoDeleter());
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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@ -184,9 +176,6 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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PM.add(createGCInfoDeleter());
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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@ -212,9 +201,6 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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PM.add(createGCInfoDeleter());
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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@ -265,6 +251,9 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
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// Standard Lower-Level Passes.
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// Set up a MachineFunction for the rest of CodeGen to work on.
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PM.add(new MachineFunctionAnalysis(*this, OptLevel));
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// Enable FastISel with -fast, but allow that to be overridden.
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if (EnableFastISelOption == cl::BOU_TRUE ||
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(OptLevel == CodeGenOpt::None && EnableFastISelOption != cl::BOU_FALSE))
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@ -48,6 +48,7 @@ static RegisterPass<LiveVariables> X("livevars", "Live Variable Analysis");
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void LiveVariables::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequiredID(UnreachableMachineBlockElimID);
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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void LiveVariables::VarInfo::dump() const {
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@ -36,15 +36,6 @@
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#include <sstream>
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using namespace llvm;
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bool MachineFunctionPass::runOnFunction(Function &F) {
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// Do not codegen any 'available_externally' functions at all, they have
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// definitions outside the translation unit.
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if (F.hasAvailableExternallyLinkage())
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return false;
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return runOnMachineFunction(MachineFunction::get(&F));
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}
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namespace {
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struct VISIBILITY_HIDDEN Printer : public MachineFunctionPass {
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static char ID;
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@ -59,6 +50,7 @@ namespace {
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) {
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@ -78,31 +70,6 @@ FunctionPass *llvm::createMachineFunctionPrinterPass(std::ostream *OS,
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return new Printer(OS, Banner);
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}
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namespace {
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struct VISIBILITY_HIDDEN Deleter : public MachineFunctionPass {
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static char ID;
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Deleter() : MachineFunctionPass(&ID) {}
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const char *getPassName() const { return "Machine Code Deleter"; }
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bool runOnMachineFunction(MachineFunction &MF) {
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// Delete the annotation from the function now.
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MachineFunction::destruct(MF.getFunction());
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return true;
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}
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};
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char Deleter::ID = 0;
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}
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/// MachineCodeDeletion Pass - This pass deletes all of the machine code for
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/// the current function, which should happen after the function has been
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/// emitted to a .s file or to memory.
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FunctionPass *llvm::createMachineCodeDeleter() {
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return new Deleter();
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}
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//===---------------------------------------------------------------------===//
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// MachineFunction implementation
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//===---------------------------------------------------------------------===//
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@ -111,7 +78,7 @@ void ilist_traits<MachineBasicBlock>::deleteNode(MachineBasicBlock *MBB) {
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MBB->getParent()->DeleteMachineBasicBlock(MBB);
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}
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MachineFunction::MachineFunction(const Function *F,
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MachineFunction::MachineFunction(Function *F,
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const TargetMachine &TM)
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: Annotation(AnnotationManager::getID("CodeGen::MachineCodeForFunction")),
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Fn(F), Target(TM) {
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@ -356,42 +323,6 @@ void MachineFunction::viewCFGOnly() const
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#endif // NDEBUG
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}
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// The next two methods are used to construct and to retrieve
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// the MachineCodeForFunction object for the given function.
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// construct() -- Allocates and initializes for a given function and target
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// get() -- Returns a handle to the object.
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// This should not be called before "construct()"
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// for a given Function.
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//
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MachineFunction&
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MachineFunction::construct(const Function *Fn, const TargetMachine &Tar)
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{
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AnnotationID MF_AID =
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AnnotationManager::getID("CodeGen::MachineCodeForFunction");
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assert(Fn->getAnnotation(MF_AID) == 0 &&
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"Object already exists for this function!");
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MachineFunction* mcInfo = new MachineFunction(Fn, Tar);
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Fn->addAnnotation(mcInfo);
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return *mcInfo;
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}
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void MachineFunction::destruct(const Function *Fn) {
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AnnotationID MF_AID =
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AnnotationManager::getID("CodeGen::MachineCodeForFunction");
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bool Deleted = Fn->deleteAnnotation(MF_AID);
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assert(Deleted && "Machine code did not exist for function!");
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Deleted = Deleted; // silence warning when no assertions.
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}
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MachineFunction& MachineFunction::get(const Function *F)
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{
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AnnotationID MF_AID =
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AnnotationManager::getID("CodeGen::MachineCodeForFunction");
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MachineFunction *mc = (MachineFunction*)F->getAnnotation(MF_AID);
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assert(mc && "Call construct() method first to allocate the object");
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return *mc;
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}
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/// addLiveIn - Add the specified physical register as a live-in value and
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/// create a corresponding virtual register for it.
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unsigned MachineFunction::addLiveIn(unsigned PReg,
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45
lib/CodeGen/MachineFunctionAnalysis.cpp
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45
lib/CodeGen/MachineFunctionAnalysis.cpp
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//===-- MachineFunctionAnalysis.cpp ---------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the definitions of the MachineFunctionAnalysis members.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineFunctionAnalysis.h"
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#include "llvm/CodeGen/MachineFunction.h"
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using namespace llvm;
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// Register this pass with PassInfo directly to avoid having to define
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// a default constructor.
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static PassInfo
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X("Machine Function Analysis", "machine-function-analysis",
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intptr_t(&MachineFunctionAnalysis::ID), 0,
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/*CFGOnly=*/false, /*is_analysis=*/true);
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char MachineFunctionAnalysis::ID = 0;
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MachineFunctionAnalysis::MachineFunctionAnalysis(TargetMachine &tm,
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CodeGenOpt::Level OL) :
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FunctionPass(&ID), TM(tm), OptLevel(OL), MF(0) {
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}
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bool MachineFunctionAnalysis::runOnFunction(Function &F) {
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assert(!MF && "MachineFunctionAnalysis already initialized!");
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MF = new MachineFunction(&F, TM);
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return false;
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}
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void MachineFunctionAnalysis::releaseMemory() {
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delete MF;
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MF = 0;
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}
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void MachineFunctionAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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}
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52
lib/CodeGen/MachineFunctionPass.cpp
Normal file
52
lib/CodeGen/MachineFunctionPass.cpp
Normal file
@ -0,0 +1,52 @@
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//===-- MachineFunctionPass.cpp -------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the definitions of the MachineFunctionPass members.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/ScalarEvolution.h"
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#include "llvm/Analysis/IVUsers.h"
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#include "llvm/Analysis/LiveValues.h"
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#include "llvm/Analysis/LoopDependenceAnalysis.h"
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#include "llvm/Analysis/MemoryDependenceAnalysis.h"
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#include "llvm/CodeGen/MachineFunctionAnalysis.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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using namespace llvm;
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bool MachineFunctionPass::runOnFunction(Function &F) {
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// Do not codegen any 'available_externally' functions at all, they have
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// definitions outside the translation unit.
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if (F.hasAvailableExternallyLinkage())
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return false;
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MachineFunction &MF = getAnalysis<MachineFunctionAnalysis>().getMF();
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return runOnMachineFunction(MF);
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}
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void MachineFunctionPass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<MachineFunctionAnalysis>();
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AU.addPreserved<MachineFunctionAnalysis>();
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// MachineFunctionPass preserves all LLVM IR passes, but there's no
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// high-level way to express this. Instead, just list a bunch of
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// passes explicitly.
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AU.addPreserved<AliasAnalysis>();
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AU.addPreserved<ScalarEvolution>();
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AU.addPreserved<IVUsers>();
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AU.addPreserved<LoopDependenceAnalysis>();
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AU.addPreserved<MemoryDependenceAnalysis>();
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AU.addPreserved<LiveValues>();
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AU.addPreserved<DominatorTree>();
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AU.addPreserved<DominanceFrontier>();
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AU.addPreserved<LoopInfo>();
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FunctionPass::getAnalysisUsage(AU);
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}
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@ -41,4 +41,5 @@ bool MachineLoopInfo::runOnMachineFunction(MachineFunction &) {
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void MachineLoopInfo::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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@ -55,6 +55,7 @@ namespace {
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF);
|
||||
|
@ -111,7 +111,6 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) {
|
||||
|
||||
#if 0
|
||||
void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
AU.setPreservesCFG();
|
||||
if (ShrinkWrapping || ShrinkWrapFunc != "") {
|
||||
AU.addRequired<MachineLoopInfo>();
|
||||
AU.addRequired<MachineDominatorTree>();
|
||||
|
@ -29,6 +29,7 @@
|
||||
#include "llvm/CodeGen/GCStrategy.h"
|
||||
#include "llvm/CodeGen/GCMetadata.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
|
||||
#include "llvm/CodeGen/MachineFrameInfo.h"
|
||||
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
||||
#include "llvm/CodeGen/MachineJumpTableInfo.h"
|
||||
@ -267,7 +268,7 @@ static void EmitLiveInCopies(MachineBasicBlock *EntryMBB,
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, CodeGenOpt::Level OL) :
|
||||
FunctionPass(&ID), TM(tm), TLI(*tm.getTargetLowering()),
|
||||
MachineFunctionPass(&ID), TM(tm), TLI(*tm.getTargetLowering()),
|
||||
FuncInfo(new FunctionLoweringInfo(TLI)),
|
||||
CurDAG(new SelectionDAG(TLI, *FuncInfo)),
|
||||
SDL(new SelectionDAGLowering(*CurDAG, TLI, *FuncInfo, OL)),
|
||||
@ -291,9 +292,12 @@ void SelectionDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
AU.addRequired<GCModuleInfo>();
|
||||
AU.addRequired<DwarfWriter>();
|
||||
AU.setPreservesAll();
|
||||
MachineFunctionPass::getAnalysisUsage(AU);
|
||||
}
|
||||
|
||||
bool SelectionDAGISel::runOnFunction(Function &Fn) {
|
||||
bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
|
||||
Function &Fn = *mf.getFunction();
|
||||
|
||||
// Do some sanity-checking on the command-line options.
|
||||
assert((!EnableFastISelVerbose || EnableFastISel) &&
|
||||
"-fast-isel-verbose requires -fast-isel");
|
||||
@ -305,12 +309,11 @@ bool SelectionDAGISel::runOnFunction(Function &Fn) {
|
||||
if (Fn.hasAvailableExternallyLinkage())
|
||||
return false;
|
||||
|
||||
|
||||
// Get alias analysis for load/store combining.
|
||||
AA = &getAnalysis<AliasAnalysis>();
|
||||
|
||||
TargetMachine &TM = TLI.getTargetMachine();
|
||||
MF = &MachineFunction::construct(&Fn, TM);
|
||||
MF = &mf;
|
||||
const TargetInstrInfo &TII = *TM.getInstrInfo();
|
||||
const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
|
||||
|
||||
|
@ -253,10 +253,10 @@ namespace {
|
||||
SPUtli(*tm.getTargetLowering())
|
||||
{ }
|
||||
|
||||
virtual bool runOnFunction(Function &Fn) {
|
||||
virtual bool runOnMachineFunction(MachineFunction &MF) {
|
||||
// Make sure we re-emit a set of the global base reg if necessary
|
||||
GlobalBaseReg = 0;
|
||||
SelectionDAGISel::runOnFunction(Fn);
|
||||
SelectionDAGISel::runOnMachineFunction(MF);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -20,6 +20,7 @@
|
||||
#include "PPCHazardRecognizers.h"
|
||||
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
|
||||
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
||||
#include "llvm/CodeGen/SelectionDAG.h"
|
||||
#include "llvm/CodeGen/SelectionDAGISel.h"
|
||||
@ -51,17 +52,12 @@ namespace {
|
||||
PPCLowering(*TM.getTargetLowering()),
|
||||
PPCSubTarget(*TM.getSubtargetImpl()) {}
|
||||
|
||||
virtual bool runOnFunction(Function &Fn) {
|
||||
// Do not codegen any 'available_externally' functions at all, they have
|
||||
// definitions outside the translation unit.
|
||||
if (Fn.hasAvailableExternallyLinkage())
|
||||
return false;
|
||||
|
||||
virtual bool runOnMachineFunction(MachineFunction &MF) {
|
||||
// Make sure we re-emit a set of the global base reg if necessary
|
||||
GlobalBaseReg = 0;
|
||||
SelectionDAGISel::runOnFunction(Fn);
|
||||
SelectionDAGISel::runOnMachineFunction(MF);
|
||||
|
||||
InsertVRSaveCode(Fn);
|
||||
InsertVRSaveCode(MF);
|
||||
return true;
|
||||
}
|
||||
|
||||
@ -181,7 +177,7 @@ namespace {
|
||||
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
|
||||
virtual void InstructionSelect();
|
||||
|
||||
void InsertVRSaveCode(Function &Fn);
|
||||
void InsertVRSaveCode(MachineFunction &MF);
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "PowerPC DAG->DAG Pattern Instruction Selection";
|
||||
@ -218,13 +214,12 @@ void PPCDAGToDAGISel::InstructionSelect() {
|
||||
/// InsertVRSaveCode - Once the entire function has been instruction selected,
|
||||
/// all virtual registers are created and all machine instructions are built,
|
||||
/// check to see if we need to save/restore VRSAVE. If so, do it.
|
||||
void PPCDAGToDAGISel::InsertVRSaveCode(Function &F) {
|
||||
void PPCDAGToDAGISel::InsertVRSaveCode(MachineFunction &Fn) {
|
||||
// Check to see if this function uses vector registers, which means we have to
|
||||
// save and restore the VRSAVE register and update it with the regs we use.
|
||||
//
|
||||
// In this case, there will be virtual registers of vector type type created
|
||||
// by the scheduler. Detect them now.
|
||||
MachineFunction &Fn = MachineFunction::get(&F);
|
||||
bool HasVectorVReg = false;
|
||||
for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
|
||||
e = RegInfo->getLastVirtReg()+1; i != e; ++i)
|
||||
|
Loading…
Reference in New Issue
Block a user