RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-03-06 03:19:50 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[MIPS] Fix DIV/DIVU scheduling classes.

Browse Source 
https://reviews.llvm.org/D46356.

llvm-svn: 331354
This commit is contained in:
Clement Courbet 2018-05-02 13:37:28 +00:00
parent d9f7aa650a
commit f69eb9be55
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/Mips/MipsScheduleGeneric.td
View File

@ -74,12 +74,12 @@ def : ItinRW<[GenericWriteMDUtoGPR], [II_MUL]>;
def GenericWriteDIV : SchedWriteRes<[GenericIssueDIV]> {
// Estimated worst case
let Latency = 33;
let ResourceCycles = [1, 33];
let ResourceCycles = [33];
}
def GenericWriteDIVU : SchedWriteRes<[GenericIssueDIV]> {
// Estimated worst case
let Latency = 31;
let ResourceCycles = [1, 31];
let ResourceCycles = [31];
}
def : ItinRW<[GenericWriteDIV], [II_DIV]>;