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add Align field, and use when generating function alignment
llvm-svn: 36371
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9dce0dffd1
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@ -211,7 +211,7 @@ bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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O << Directive << CurrentFnName << "\n";
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if (AFI->isThumbFunction()) {
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EmitAlignment(1, F);
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EmitAlignment(AFI->getAlign(), F);
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O << "\t.code\t16\n";
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O << "\t.thumb_func";
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if (Subtarget->isTargetDarwin())
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@ -27,9 +27,14 @@ namespace llvm {
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class ARMFunctionInfo : public MachineFunctionInfo {
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/// isThumb - True if this function is compiled under Thumb mode.
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///
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/// Used to initialized Align, so must precede it.
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bool isThumb;
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/// Align - required alignment. ARM functions and Thumb functions with
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/// constant pools require 4-byte alignment; other Thumb functions
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/// require only 2-byte alignment.
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unsigned Align;
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/// VarArgsRegSaveSize - Size of the register save area for vararg functions.
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///
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unsigned VarArgsRegSaveSize;
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@ -85,6 +90,7 @@ class ARMFunctionInfo : public MachineFunctionInfo {
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public:
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ARMFunctionInfo() :
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isThumb(false),
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Align(2U),
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VarArgsRegSaveSize(0), HasStackFrame(false),
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LRSpilledForFarJump(false), R3IsLiveIn(false),
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FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
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@ -94,6 +100,7 @@ public:
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ARMFunctionInfo(MachineFunction &MF) :
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isThumb(MF.getTarget().getSubtarget<ARMSubtarget>().isThumb()),
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Align(isThumb ? 1U : 2U),
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VarArgsRegSaveSize(0), HasStackFrame(false),
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LRSpilledForFarJump(false), R3IsLiveIn(false),
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FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
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@ -104,6 +111,9 @@ public:
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bool isThumbFunction() const { return isThumb; }
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unsigned getAlign() const { return Align; }
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void setAlign(unsigned a) { Align = a; }
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unsigned getVarArgsRegSaveSize() const { return VarArgsRegSaveSize; }
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void setVarArgsRegSaveSize(unsigned s) { VarArgsRegSaveSize = s; }
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