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Fill in the default predication bits for ARM unconditional branch.
llvm-svn: 118907
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@ -1381,6 +1381,7 @@ let isBranch = 1, isTerminator = 1 in {
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def B : ABXI<0b1010, (outs), (ins brtarget:$target), IIC_Br,
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"b\t$target", [(br bb:$target)]> {
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bits<24> target;
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let Inst{31-28} = 0b1110;
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let Inst{23-0} = target;
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}
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