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[LFTR] Regenerate test checks; NFC
llvm-svn: 365262
This commit is contained in:
Nikita Popov
parent
cb7411dab4
commit
fc70fc0cef
@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -indvars -S | FileCheck %s
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; Provide legal integer types.
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@ -10,11 +11,146 @@ target datalayout = "n8:16:32:64"
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define void @f() {
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; CHECK-LABEL: @f(
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; CHECK-LABEL: entry:
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; CHECK: br label %[[for_cond2_preheader:.*]]
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[TMP0]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP1]], 0
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; CHECK-NEXT: br label [[FOR_COND2_PREHEADER:%.*]]
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; CHECK: for.cond2.preheader:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC13:%.*]] ], [ -14, [[ENTRY:%.*]] ]
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; CHECK-NEXT: br i1 [[TOBOOL2]], label [[FOR_INC13]], label [[FOR_BODY3_LR_PH:%.*]]
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; CHECK: for.body3.lr.ph:
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; CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 3
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; CHECK-NEXT: [[DIV:%.*]] = select i1 [[TMP3]], i32 [[INDVARS_IV]], i32 0
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; CHECK-NEXT: br i1 false, label [[FOR_BODY3_LR_PH_SPLIT_US:%.*]], label [[FOR_BODY3_LR_PH_FOR_BODY3_LR_PH_SPLIT_CRIT_EDGE:%.*]]
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; CHECK: for.body3.lr.ph.for.body3.lr.ph.split_crit_edge:
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; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_SPLIT:%.*]]
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; CHECK: for.body3.lr.ph.split.us:
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_BODY3_LR_PH_SPLIT_US_SPLIT_US:%.*]], label [[FOR_BODY3_LR_PH_SPLIT_US_FOR_BODY3_LR_PH_SPLIT_US_SPLIT_CRIT_EDGE:%.*]]
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; CHECK: for.body3.lr.ph.split.us.for.body3.lr.ph.split.us.split_crit_edge:
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; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_SPLIT_US_SPLIT:%.*]]
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; CHECK: for.body3.lr.ph.split.us.split.us:
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; CHECK-NEXT: br label [[FOR_BODY3_US_US:%.*]]
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; CHECK: for.body3.us.us:
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; CHECK-NEXT: br i1 true, label [[COND_FALSE_US_US:%.*]], label [[COND_END_US_US:%.*]]
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; CHECK: cond.false.us.us:
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; CHECK-NEXT: br label [[COND_END_US_US]]
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; CHECK: cond.end.us.us:
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* @b, align 4
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; CHECK-NEXT: [[CMP91_US_US:%.*]] = icmp slt i32 [[TMP4]], 1
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; CHECK-NEXT: br i1 [[CMP91_US_US]], label [[FOR_INC_LR_PH_US_US:%.*]], label [[FOR_COND2_LOOPEXIT_US_US:%.*]]
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; CHECK: for.cond2.loopexit.us.us:
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; CHECK-NEXT: br i1 true, label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA_US:%.*]], label [[FOR_BODY3_US_US]]
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; CHECK: for.inc.lr.ph.us.us:
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; CHECK-NEXT: br label [[FOR_INC_US_US:%.*]]
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; CHECK: for.cond8.for.cond2.loopexit_crit_edge.us.us:
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; CHECK-NEXT: store i32 1, i32* @b, align 4
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; CHECK-NEXT: br label [[FOR_COND2_LOOPEXIT_US_US]]
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; CHECK: for.inc.us.us:
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; CHECK-NEXT: [[TMP5:%.*]] = phi i32 [ [[TMP4]], [[FOR_INC_LR_PH_US_US]] ], [ [[INC_US_US:%.*]], [[FOR_INC_US_US]] ]
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; CHECK-NEXT: [[INC_US_US]] = add nsw i32 [[TMP5]], 1
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; CHECK-NEXT: [[EXITCOND3:%.*]] = icmp ne i32 [[INC_US_US]], 1
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; CHECK-NEXT: br i1 [[EXITCOND3]], label [[FOR_INC_US_US]], label [[FOR_COND8_FOR_COND2_LOOPEXIT_CRIT_EDGE_US_US:%.*]]
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; CHECK: for.cond2.for.inc13_crit_edge.us-lcssa.us.us-lcssa.us:
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; CHECK-NEXT: br label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US:%.*]]
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; CHECK: for.body3.lr.ph.split.us.split:
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; CHECK-NEXT: br label [[FOR_BODY3_US:%.*]]
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; CHECK: for.body3.us:
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; CHECK-NEXT: br i1 true, label [[COND_FALSE_US:%.*]], label [[COND_END_US:%.*]]
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; CHECK: cond.false.us:
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; CHECK-NEXT: br label [[COND_END_US]]
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; CHECK: cond.end.us:
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; CHECK-NEXT: [[COND_US:%.*]] = phi i32 [ [[DIV]], [[COND_FALSE_US]] ], [ [[INDVARS_IV]], [[FOR_BODY3_US]] ]
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; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* @b, align 4
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; CHECK-NEXT: [[CMP91_US:%.*]] = icmp slt i32 [[TMP6]], 1
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; CHECK-NEXT: br i1 [[CMP91_US]], label [[FOR_INC_LR_PH_US:%.*]], label [[FOR_COND2_LOOPEXIT_US:%.*]]
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; CHECK: for.inc.us:
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; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP6]], [[FOR_INC_LR_PH_US]] ], [ [[INC_US:%.*]], [[FOR_INC_US:%.*]] ]
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; CHECK-NEXT: [[INC_US]] = add nsw i32 [[TMP7]], 1
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; CHECK-NEXT: [[EXITCOND2:%.*]] = icmp ne i32 [[INC_US]], 1
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; CHECK-NEXT: br i1 [[EXITCOND2]], label [[FOR_INC_US]], label [[FOR_COND8_FOR_COND2_LOOPEXIT_CRIT_EDGE_US:%.*]]
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; CHECK: for.cond2.loopexit.us:
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; CHECK-NEXT: br i1 false, label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA:%.*]], label [[FOR_BODY3_US]]
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; CHECK: for.inc.lr.ph.us:
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; CHECK-NEXT: br label [[FOR_INC_US]]
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; CHECK: for.cond8.for.cond2.loopexit_crit_edge.us:
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; CHECK-NEXT: store i32 1, i32* @b, align 4
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; CHECK-NEXT: br label [[FOR_COND2_LOOPEXIT_US]]
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; CHECK: for.cond2.for.inc13_crit_edge.us-lcssa.us.us-lcssa:
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; CHECK-NEXT: [[COND_LCSSA_PH_US_PH:%.*]] = phi i32 [ [[COND_US]], [[FOR_COND2_LOOPEXIT_US]] ]
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; CHECK-NEXT: br label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US]]
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; CHECK: for.cond2.for.inc13_crit_edge.us-lcssa.us:
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; CHECK-NEXT: [[COND_LCSSA_PH_US:%.*]] = phi i32 [ [[COND_LCSSA_PH_US_PH]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA]] ], [ [[DIV]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA_US]] ]
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; CHECK-NEXT: br label [[FOR_COND2_FOR_INC13_CRIT_EDGE:%.*]]
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; CHECK: for.body3.lr.ph.split:
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_BODY3_LR_PH_SPLIT_SPLIT_US:%.*]], label [[FOR_BODY3_LR_PH_SPLIT_FOR_BODY3_LR_PH_SPLIT_SPLIT_CRIT_EDGE:%.*]]
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; CHECK: for.body3.lr.ph.split.for.body3.lr.ph.split.split_crit_edge:
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; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_SPLIT_SPLIT:%.*]]
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; CHECK: for.body3.lr.ph.split.split.us:
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; CHECK-NEXT: br label [[FOR_BODY3_US3:%.*]]
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; CHECK: for.body3.us3:
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; CHECK-NEXT: br i1 false, label [[COND_FALSE_US4:%.*]], label [[COND_END_US5:%.*]]
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; CHECK: cond.false.us4:
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; CHECK-NEXT: br label [[COND_END_US5]]
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; CHECK: cond.end.us5:
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; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* @b, align 4
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; CHECK-NEXT: [[CMP91_US7:%.*]] = icmp slt i32 [[TMP8]], 1
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; CHECK-NEXT: br i1 [[CMP91_US7]], label [[FOR_INC_LR_PH_US12:%.*]], label [[FOR_COND2_LOOPEXIT_US11:%.*]]
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; CHECK: for.inc.us8:
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; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP8]], [[FOR_INC_LR_PH_US12]] ], [ [[INC_US9:%.*]], [[FOR_INC_US8:%.*]] ]
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; CHECK-NEXT: [[INC_US9]] = add nsw i32 [[TMP9]], 1
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; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[INC_US9]], 1
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; CHECK-NEXT: br i1 [[EXITCOND1]], label [[FOR_INC_US8]], label [[FOR_COND8_FOR_COND2_LOOPEXIT_CRIT_EDGE_US13:%.*]]
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; CHECK: for.cond2.loopexit.us11:
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; CHECK-NEXT: br i1 true, label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_LCSSA_US:%.*]], label [[FOR_BODY3_US3]]
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; CHECK: for.inc.lr.ph.us12:
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; CHECK-NEXT: br label [[FOR_INC_US8]]
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; CHECK: for.cond8.for.cond2.loopexit_crit_edge.us13:
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; CHECK-NEXT: store i32 1, i32* @b, align 4
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; CHECK-NEXT: br label [[FOR_COND2_LOOPEXIT_US11]]
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; CHECK: for.cond2.for.inc13_crit_edge.us-lcssa.us-lcssa.us:
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; CHECK-NEXT: br label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA:%.*]]
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; CHECK: for.body3.lr.ph.split.split:
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; CHECK-NEXT: br label [[FOR_BODY3:%.*]]
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; CHECK: for.cond8.for.cond2.loopexit_crit_edge:
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; CHECK-NEXT: store i32 1, i32* @b, align 4
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; CHECK-NEXT: br label [[FOR_COND2_LOOPEXIT:%.*]]
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; CHECK: for.cond2.loopexit:
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; CHECK-NEXT: br i1 false, label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_LCSSA:%.*]], label [[FOR_BODY3]]
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; CHECK: for.body3:
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; CHECK-NEXT: br i1 false, label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
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; CHECK: cond.false:
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; CHECK-NEXT: br label [[COND_END]]
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; CHECK: cond.end:
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; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* @b, align 4
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; CHECK-NEXT: [[CMP91:%.*]] = icmp slt i32 [[TMP10]], 1
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; CHECK-NEXT: br i1 [[CMP91]], label [[FOR_INC_LR_PH:%.*]], label [[FOR_COND2_LOOPEXIT]]
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; CHECK: for.inc.lr.ph:
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; CHECK-NEXT: br label [[FOR_INC:%.*]]
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; CHECK: for.inc:
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; CHECK-NEXT: [[TMP11:%.*]] = phi i32 [ [[TMP10]], [[FOR_INC_LR_PH]] ], [ [[INC:%.*]], [[FOR_INC]] ]
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; CHECK-NEXT: [[INC]] = add nsw i32 [[TMP11]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], 1
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_INC]], label [[FOR_COND8_FOR_COND2_LOOPEXIT_CRIT_EDGE:%.*]]
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; CHECK: for.cond2.for.inc13_crit_edge.us-lcssa.us-lcssa:
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; CHECK-NEXT: br label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA]]
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; CHECK: for.cond2.for.inc13_crit_edge.us-lcssa:
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; CHECK-NEXT: [[COND_LCSSA_PH:%.*]] = phi i32 [ [[INDVARS_IV]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_LCSSA]] ], [ [[INDVARS_IV]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_LCSSA_US]] ]
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; CHECK-NEXT: br label [[FOR_COND2_FOR_INC13_CRIT_EDGE]]
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; CHECK: for.cond2.for.inc13_crit_edge:
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; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i32 [ [[COND_LCSSA_PH]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA]] ], [ [[COND_LCSSA_PH_US]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US]] ]
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; CHECK-NEXT: store i32 [[COND_LCSSA]], i32* @c, align 4
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; CHECK-NEXT: br label [[FOR_INC13]]
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; CHECK: for.inc13:
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND4:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], 0
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; CHECK-NEXT: br i1 [[EXITCOND4]], label [[FOR_COND2_PREHEADER]], label [[FOR_END15:%.*]]
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; CHECK: for.end15:
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; CHECK-NEXT: ret void
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;
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; CHECK: [[for_cond2_preheader]]:
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; CHECK-NEXT: %[[indvars_iv:.*]] = phi i32 [ %[[indvars_iv_next:.*]], %[[for_inc13:.*]] ], [ -14, %entry ]
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; br i1 {{.*}}, label %[[for_inc13]], label %
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entry:
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%0 = load i32, i32* @a, align 4
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@ -207,17 +343,11 @@ for.cond2.for.inc13_crit_edge: ; preds = %for.cond2.for.inc13
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store i32 %cond.lcssa, i32* @c, align 4
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br label %for.inc13
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; CHECK: [[for_inc13]]:
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; CHECK-NEXT: %[[indvars_iv_next]] = add nsw i32 %[[indvars_iv]], 1
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; CHECK-NEXT: %[[exitcond4:.*]] = icmp ne i32 %[[indvars_iv_next]], 0
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; CHECK-NEXT: br i1 %[[exitcond4]], label %[[for_cond2_preheader]], label %[[for_end15:.*]]
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for.inc13: ; preds = %for.cond2.for.inc13_crit_edge, %for.cond2.preheader
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%inc14 = add i8 %storemerge15, 1
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%cmp = icmp ugt i8 %inc14, 50
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br i1 %cmp, label %for.cond2.preheader, label %for.end15
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; CHECK: [[for_end15]]:
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; CHECK-NEXT: ret void
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for.end15: ; preds = %for.inc13
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ret void
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}
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