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[AVX-512] Remove COPY_TO_REGCLASS from a few patterns that already had the correct register class.
llvm-svn: 281860
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@ -5589,13 +5589,13 @@ defm VCVTSD2USI64Z: avx512_cvt_s_int_round<0x79, f64x_info, i64x_info,
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// Therefore, the SSE intrinsics are mapped to the AVX512 instructions.
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let Predicates = [HasAVX512] in {
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def : Pat<(i32 (int_x86_sse_cvtss2si (v4f32 VR128X:$src))),
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(VCVTSS2SIZrr (COPY_TO_REGCLASS VR128X:$src, FR32X))>;
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(VCVTSS2SIZrr VR128X:$src)>;
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def : Pat<(i64 (int_x86_sse_cvtss2si64 (v4f32 VR128X:$src))),
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(VCVTSS2SI64Zrr (COPY_TO_REGCLASS VR128X:$src, FR32X))>;
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(VCVTSS2SI64Zrr VR128X:$src)>;
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def : Pat<(i32 (int_x86_sse2_cvtsd2si (v2f64 VR128X:$src))),
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(VCVTSD2SIZrr (COPY_TO_REGCLASS VR128X:$src, FR64X))>;
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(VCVTSD2SIZrr VR128X:$src)>;
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def : Pat<(i64 (int_x86_sse2_cvtsd2si64 (v2f64 VR128X:$src))),
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(VCVTSD2SI64Zrr (COPY_TO_REGCLASS VR128X:$src, FR64X))>;
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(VCVTSD2SI64Zrr VR128X:$src)>;
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} // HasAVX512
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let isCodeGenOnly = 1 , Predicates = [HasAVX512] in {
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@ -5690,13 +5690,13 @@ defm VCVTTSD2USI64Z: avx512_cvt_s_all<0x78, "vcvttsd2usi", f64x_info, i64x_info,
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XD, VEX_W, EVEX_CD8<64, CD8VT1>;
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let Predicates = [HasAVX512] in {
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def : Pat<(i32 (int_x86_sse_cvttss2si (v4f32 VR128X:$src))),
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(VCVTTSS2SIZrr_Int (COPY_TO_REGCLASS VR128X:$src, FR32X))>;
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(VCVTTSS2SIZrr_Int VR128X:$src)>;
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def : Pat<(i64 (int_x86_sse_cvttss2si64 (v4f32 VR128X:$src))),
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(VCVTTSS2SI64Zrr_Int (COPY_TO_REGCLASS VR128X:$src, FR32X))>;
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(VCVTTSS2SI64Zrr_Int VR128X:$src)>;
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def : Pat<(i32 (int_x86_sse2_cvttsd2si (v2f64 VR128X:$src))),
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(VCVTTSD2SIZrr_Int (COPY_TO_REGCLASS VR128X:$src, FR64X))>;
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(VCVTTSD2SIZrr_Int VR128X:$src)>;
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def : Pat<(i64 (int_x86_sse2_cvttsd2si64 (v2f64 VR128X:$src))),
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(VCVTTSD2SI64Zrr_Int (COPY_TO_REGCLASS VR128X:$src, FR64X))>;
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(VCVTTSD2SI64Zrr_Int VR128X:$src)>;
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} // HasAVX512
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//===----------------------------------------------------------------------===//
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