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Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:

Browse Source 
_test:
	fctiwz f0, f1
	stfiwx f0, 0, r4
	blr 

instead of:

_test:
	fctiwz f0, f1
	stfd f0, -8(r1)
	nop
	nop
	lwz r2, -4(r1)
	stb r2, 0(r4)
	blr 

The former is not correct (stores 4 bytes, not 1).

llvm-svn: 46161
This commit is contained in:
Chris Lattner 2008-01-18 16:54:56 +00:00
parent eb7d65d073
commit febc7ea9bf
2 changed files with 12 additions and 0 deletions
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1
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -3184,6 +3184,7 @@ SDOperand PPCTargetLowering::PerformDAGCombine(SDNode *N,
case ISD::STORE: case ISD::STORE:
// Turn STORE (FP_TO_SINT F) -> STFIWX(FCTIWZ(F)). // Turn STORE (FP_TO_SINT F) -> STFIWX(FCTIWZ(F)).
if (TM.getSubtarget<PPCSubtarget>().hasSTFIWX() && if (TM.getSubtarget<PPCSubtarget>().hasSTFIWX() &&
!cast<StoreSDNode>(N)->isTruncatingStore() &&
N->getOperand(1).getOpcode() == ISD::FP_TO_SINT && N->getOperand(1).getOpcode() == ISD::FP_TO_SINT &&
N->getOperand(1).getValueType() == MVT::i32 && N->getOperand(1).getValueType() == MVT::i32 &&
N->getOperand(1).getOperand(0).getValueType() != MVT::ppcf128) { N->getOperand(1).getOperand(0).getValueType() != MVT::ppcf128) {

11
test/CodeGen/PowerPC/stfiwx-2.ll Normal file
View File

@ -0,0 +1,11 @@
; This cannot be a stfiwx
; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep stb
; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep stfiwx
define void @test(float %F, i8* %P) {
%I = fptosi float %F to i32
%X = trunc i32 %I to i8
store i8 %X, i8* %P
ret void
}