RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-14 23:50:50 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
80,037 Commits 4 Branches 5 Tags
Commit Graph

3733 Commits

Author SHA1 Message Date
Duncan Sands
926a63ed67 Ensure timestamps are not embedded into files when doing a release build. 
llvm-svn: 142647
 2011-10-21 09:47:14 +00:00
Bill Wendling
7956e709bf Modify the script to output the regressions and passes into categories. My Python-fu could use some improving... 
llvm-svn: 142643
 2011-10-21 06:58:01 +00:00
Bill Wendling
e9d5765aba Check for divide by zero. 
llvm-svn: 142640
 2011-10-21 06:26:01 +00:00
Duncan Sands
b3278272ae Also compare the built dragonegg objects between phases 2 and 3. 
llvm-svn: 142608
 2011-10-20 20:14:18 +00:00
Duncan Sands
c52861c44e Reset the system compiler each time we start a new flavour. Otherwise 
the last compiler built for the previous flavour is used for the next,
for example the Debug clang compiler was being used for the initial build
of the Release LLVM.  Flavors should be independent of each other.  This
especially matters if the compiler built for the previous flavour doesn't
actually work!

llvm-svn: 142607
 2011-10-20 20:10:58 +00:00
Duncan Sands
6c9aa4404d Add support for testing dragonegg. This is disabled by default. 
In fact this commit is not intended to change anything unless you
use one of the new command line flags.

llvm-svn: 142577
 2011-10-20 11:13:04 +00:00
Bill Wendling
71741da8ac Revamp the script to handle the 'TEST=simple' output. 
llvm-svn: 142559
 2011-10-20 00:45:46 +00:00
Bill Wendling
29934af872 Duncan pointed out that sometimes CC and CXX are used to specify the compiler. Also that the configure script takes care of finding an appropriate compiler if one's not specified. 
llvm-svn: 142489
 2011-10-19 09:47:00 +00:00
Bill Wendling
c668bbe90f Use bash instead. 
llvm-svn: 142486
 2011-10-19 09:25:49 +00:00
Bill Wendling
f28fe31f2e Make changes so that this runs on FreeBSD. 
llvm-svn: 142482
 2011-10-19 08:42:07 +00:00
Joe Abbey
1a12882b26 Adding dependencies to allow -DBUILD_SHARED_LIBS=true to complete. 
llvm-svn: 142464
 2011-10-19 00:13:13 +00:00
Jim Grosbach
6a932d6ad1 ARM VTBL (one register) assembly parsing and encoding. 
llvm-svn: 142441
 2011-10-18 23:02:30 +00:00
Bill Wendling
8e0af5ff3b Don't exit just because some early commands fail. Use the -k flag when running the checks. 
llvm-svn: 142369
 2011-10-18 17:27:12 +00:00
Jim Grosbach
031bb99231 ARM assembly parsing and encoding for VMOV.i64. 
llvm-svn: 142356
 2011-10-18 16:18:11 +00:00
Jim Grosbach
bcfb4ed53c ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32. 
llvm-svn: 142321
 2011-10-18 00:22:00 +00:00
Jim Grosbach
1e994e76a7 ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16. 
llvm-svn: 142303
 2011-10-17 23:09:09 +00:00
Jim Grosbach
f3d495fbbd ARM NEON "vmov.i8" immediate assembly parsing and encoding. 
NEON immediates are "interesting". Start of the work to handle parsing them
in an 'as' compatible manner. Getting the matcher to play nicely with
these and the floating point immediates from VFP is an extra fun wrinkle.

llvm-svn: 142293
 2011-10-17 22:26:03 +00:00
Bill Wendling
6e5fb6cb2c Forgot to add the project name to the 'svn ls' command. 
llvm-svn: 142282
 2011-10-17 21:45:07 +00:00
Bill Wendling
0200836f77 Add message to svn mkdir command. 
llvm-svn: 142280
 2011-10-17 21:42:29 +00:00
Owen Anderson
9e30a8355b Fix unused variable warning in the rare circumstance that we have no feature-dependent instructions. 
llvm-svn: 142193
 2011-10-17 16:56:47 +00:00
Benjamin Kramer
6ebeef58ed Pick low-hanging MatchEntry shrinkage fruit. 
Shaves 200k off Release-Asserts clang binaries on i386.

llvm-svn: 142191
 2011-10-17 16:18:09 +00:00
Bill Wendling
d425d074bd Don't download and compile compiler-rt, libcxx, and libcxxabi by default. 
llvm-svn: 142185
 2011-10-17 08:41:20 +00:00
Bill Wendling
f3cbc7f9a3 Update to disable asserts. Build a phase 3 compiler, and compare phase 2 files against phase 3. 
llvm-svn: 142173
 2011-10-17 04:46:54 +00:00
Bill Wendling
dae5ca9d5b Overhaul the 'test-release' script. 
This removes support for building llvm-gcc. It will eventually add support for
building other projects.

llvm-svn: 142165
 2011-10-16 22:44:08 +00:00
Bill Wendling
885861ca36 Update the tree before applying patch. 
llvm-svn: 142155
 2011-10-16 20:59:25 +00:00
Craig Topper
6c900d9810 Add X86 PEXTR and PDEP instructions. 
llvm-svn: 142141
 2011-10-16 16:50:08 +00:00
Craig Topper
2cd868184c Add X86 BZHI instruction as well as BMI2 feature detection. 
llvm-svn: 142122
 2011-10-16 07:55:05 +00:00
Craig Topper
91b4292682 Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr. 
llvm-svn: 142117
 2011-10-16 07:05:40 +00:00
Chris Lattner
391d90c9a6 Make SMDiagnostic a little more sane. Instead of passing around note/warning/error as a 
string, pass it around as an enum.

llvm-svn: 142107
 2011-10-16 05:43:57 +00:00
Chris Lattner
321335142c Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does. Enhance 
the X86 asmparser to produce ranges in the one case that was annoying me, for example:

test.s:10:15: error: invalid operand for instruction
movl 0(%rax), 0(%edx)
              ^~~~~~~

It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use 
ranges where appropriate if someone is interested.

llvm-svn: 142106
 2011-10-16 04:47:35 +00:00
Craig Topper
4c6357d4af Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen 
llvm-svn: 142105
 2011-10-16 03:51:13 +00:00
Bill Wendling
47d9e6b496 Add a helper script to create branches and tag release candidates. 
llvm-svn: 142098
 2011-10-16 02:03:18 +00:00
Bill Wendling
8cb937e255 Add a script that helps merge changes into a release branch. 
llvm-svn: 142097
 2011-10-16 01:54:03 +00:00
Craig Topper
62e63d9bb9 Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work because these are the first VEX encoded instructions to use the reg field as an opcode extension. 
llvm-svn: 142082
 2011-10-15 20:46:47 +00:00
David Greene
49763ec294 Fix threads/jobs Calculation 
Pass the correct jobs and threads information to the builder.
We were underutilizing the number of jobs and threads specified
by the user.

llvm-svn: 141977
 2011-10-14 19:12:37 +00:00
David Greene
81607c1378 Add Helpful Messages 
Bit just a bit more verbose about what's going on.  Print options
to make to aid debugging.

llvm-svn: 141976
 2011-10-14 19:12:35 +00:00
David Greene
082a0faa50 Add Option to Skip Install 
Add a --no-install option to skip installing components.  This
speeds up the develop/test cycle.

llvm-svn: 141975
 2011-10-14 19:12:34 +00:00
David Greene
2e7a259810 Add Option to Skip gcc Build 
And a --no-gcc option to skip dragonegg and gcc builds.
This greatly speeds up the develop/test cycle.

llvm-svn: 141974
 2011-10-14 19:12:33 +00:00
Craig Topper
0a11eb1b21 Add X86 ANDN instruction. Including instruction selection. 
llvm-svn: 141947
 2011-10-14 07:06:56 +00:00
Jakob Stoklund Olesen
a31553dbf7 Ban rematerializable instructions with side effects. 
TableGen infers unmodeled side effects on instructions without a
pattern.  Fix some instruction definitions where that was overlooked.

Also raise an error if a rematerializable instruction has unmodeled side
effects. That doen't make any sense.

llvm-svn: 141929
 2011-10-14 01:00:49 +00:00
Jim Grosbach
eb7acc978a ARM parsing and encoding for the <option> form of LDC/STC instructions. 
llvm-svn: 141786
 2011-10-12 17:34:41 +00:00
Eli Friedman
0a06205b37 Remove extra semicolon. 
llvm-svn: 141699
 2011-10-11 19:53:40 +00:00
Craig Topper
7ae42fbd7e Fix disassembling of popcntw. Also remove some code that says it accounts for 64BIT_REXW_XD not existing, but it does exist. 
llvm-svn: 141642
 2011-10-11 04:34:23 +00:00
Jakob Stoklund Olesen
ad7ffa5235 Emit full ED initializers even for pseudo-instructions. 
This should unbreak the picky buildbots.

llvm-svn: 141575
 2011-10-10 20:15:49 +00:00
Jakob Stoklund Olesen
f46c756068 Insert dummy ED table entries for pseudo-instructions. 
The table is indexed by opcode, so simply removing pseudo-instructions
creates a wrong mapping from opcode to table entry.

Add a test case for xorps which has a very high opcode that exposes this
problem.

llvm-svn: 141562
 2011-10-10 18:30:16 +00:00
Jim Grosbach
94980a23e6 ARM NEON assembly parsing and encoding for VDUP(scalar). 
llvm-svn: 141446
 2011-10-07 23:56:00 +00:00
David Greene
ae3329d597 Remove Multidefs 
Multidefs are a bit unwieldy and incomplete.  Remove them in favor of
another mechanism, probably for loops.

Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"

llvm-svn: 141378
 2011-10-07 18:25:05 +00:00
Craig Topper
f083691b6d Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. 
llvm-svn: 141353
 2011-10-07 05:35:38 +00:00
Peter Collingbourne
fe4c1d613c Remove the Clang tblgen backends from LLVM. 
llvm-svn: 141293
 2011-10-06 13:21:42 +00:00
Craig Topper
2614f6f120 Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax. 
llvm-svn: 141274
 2011-10-06 06:44:41 +00:00