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Author SHA1 Message Date
Jim Grosbach
5b43c7fe81 Add FIXME. Thumb2 ADR encoding choice is non-trivial. 
llvm-svn: 139008
 2011-09-02 17:21:59 +00:00
Jakub Staszak
4df162e09b Return undef value (instead of arbitrary) for wrong or undef index in 
ConstantVector.

llvm-svn: 139007
 2011-09-02 17:01:40 +00:00
Jakub Staszak
132e24bf28 ConstantVector returns arbitrary value for the wrong index. 
This fixes PR10813.

llvm-svn: 139006
 2011-09-02 15:43:43 +00:00
Jakub Staszak
b82758ae9b Compare type size instead of type _store_ size to make sure that BitCastInst 
will be valid. This fixes PR10820.

llvm-svn: 139005
 2011-09-02 14:57:37 +00:00
Kalle Raiskila
7c154fe467 Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction. 
llvm-svn: 139004
 2011-09-02 10:05:01 +00:00
Craig Topper
316c7bfe37 Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806. 
llvm-svn: 138997
 2011-09-02 04:17:54 +00:00
Bill Wendling
66d5793dcf Perform the upgrading of the old EH to the new EH in a more sane manner. 
Perform the upgrading in steps.

* First, create a map of the invokes to the EH intrinsics.

* Next, take that mapping and determine if the invoke's unwind destination has a
  single predecessor. If not, then create a new empty block to hold the new
  landingpad instruction.

* Create a landingpad instruction into the uwnind destination. Fill it with the
  values from the old selector. Map the old intrinsic calls to the new
  landingpad values (there may be multiple landingpad instructions per instrinic
  call pairs).

* Go through the old intrinsic calls, create a PHI node when necessary, and then
  replace their values with the new values from the landingpad instructions.

* Delete all dead instructions.

* ???

* Profit!

llvm-svn: 138990
 2011-09-02 01:30:08 +00:00
Bill Wendling
a96c532f67 Update to new EH scheme. 
llvm-svn: 138989
 2011-09-02 01:25:11 +00:00
Owen Anderson
a319b9901d Merge the ARM disassembler header into the implementation file, since it is not externally exposed. 
llvm-svn: 138982
 2011-09-01 23:35:51 +00:00
Owen Anderson
c4ec9cc45f Fix 80 columns violations. 
llvm-svn: 138980
 2011-09-01 23:23:50 +00:00
Dan Gohman
6d0230847c Revert r131152, r129796, r129761. This code is currently considered 
to be unreliable on platforms which require memcpy calls, and it is
complicating broader legalize cleanups. It is hoped that these cleanups
will make memcpy byval easier to implement in the future.

llvm-svn: 138977
 2011-09-01 23:07:08 +00:00
Benjamin Kramer
bd939ad83e Don't drop alignment info on local common symbols. 
- On COFF the .lcomm directive has an alignment argument.
- On ELF we fall back to .local + .comm

Based on a patch by NAKAMURA Takumi.

Fixes PR9337, PR9483 and PR10128.

llvm-svn: 138976
 2011-09-01 23:04:27 +00:00
Eli Friedman
1400b24e06 Null-initialize to shut up -Wuninitialized warnings. 
llvm-svn: 138974
 2011-09-01 22:27:41 +00:00
James Molloy
5f19051fbd Fix apparent build error caused by r138948 on certain versions of GCC with -Werror. Sorry for the inconvenience. 
llvm-svn: 138973
 2011-09-01 22:01:14 +00:00
Bill Wendling
b6a419d0f0 Reduce indentation. No functionality change. 
llvm-svn: 138968
 2011-09-01 21:29:49 +00:00
Bill Wendling
759eb19f0b Change worklist driven deletion to be an iterative process. 
Duncan noticed this!

llvm-svn: 138967
 2011-09-01 21:28:33 +00:00
Eli Friedman
2f99e7b97a Fix test; sorry for any inconvenience. 
llvm-svn: 138966
 2011-09-01 21:25:42 +00:00
Eli Friedman
00a62b2122 Fix an issue with the IR sink pass found by inspection. (I'm not sure anyone is actually using this, but might as well fix it since I found the issue.) 
llvm-svn: 138965
 2011-09-01 21:21:24 +00:00
Eli Friedman
a154929048 Add missing newline. 
llvm-svn: 138964
 2011-09-01 21:20:11 +00:00
Nick Lewycky
99efd4b3ac Fix the build for us -Werror users. 
Remove broken emacs mode major notation marking a C++ file as C.
No functionality change.

llvm-svn: 138963
 2011-09-01 21:09:04 +00:00
Eli Friedman
3e1fc84a39 Make isSafeToSpeculativelyExecute() return the right answer for some new instructions. Found by inspection; not sure what practical impact, if any, this has. 
llvm-svn: 138962
 2011-09-01 21:03:03 +00:00
Benjamin Kramer
4ed9810e77 XFAIL this test on arm until the backend is fixed. 
llvm-svn: 138955
 2011-09-01 18:40:03 +00:00
Benjamin Kramer
ca7001eedb This test depends on cmov being available. 
llvm-svn: 138954
 2011-09-01 18:40:01 +00:00
Jakob Stoklund Olesen
c26e2e6221 Permit remat of partial register defs when it is safe. 
An instruction may define part of a register where the other bits are
undefined. In that case, it is safe to rematerialize the instruction.
For example:

  %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>

The extra <imp-def> operand indicates that the instruction does not read
the other parts of the virtual register, so a remat is safe.

This patch simply allows multiple def operands for the virtual register.
It is MI->readsVirtualRegister() that determines if we depend on a
previous value so remat is impossible.

llvm-svn: 138953
 2011-09-01 18:27:51 +00:00
Jim Grosbach
36ea6726dd ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code. 
llvm-svn: 138952
 2011-09-01 18:22:13 +00:00
Bruno Cardoso Lopes
10f234f1a7 Fix vbroadcast matching logic to early unmatch if the node doesn't have 
only one use. Fix PR10825.

llvm-svn: 138951
 2011-09-01 18:15:06 +00:00
James Molloy
4a63186421 Fix up r137380 based on post-commit review by Jim Grosbach. 
llvm-svn: 138948
 2011-09-01 18:02:14 +00:00
Owen Anderson
d8157fabfb t2Bcc is allowed to have a predicate without a preceding IT instruction. 
llvm-svn: 138946
 2011-09-01 17:47:45 +00:00
Jakob Stoklund Olesen
ff7cf9e336 Revert r138794, "Do not try to rematerialize a value from a partial definition." 
The problem is fixed for all register allocators by r138944, so this
patch is no longer necessary.

<rdar://problem/10032939>

llvm-svn: 138945
 2011-09-01 17:25:18 +00:00
Jakob Stoklund Olesen
bc000bf219 Prevent remat of partial register redefinitions. 
An instruction that redefines only part of a larger register can never
be rematerialized since the virtual register value depends on the old
value in other parts of the register.

This was fixed for the inline spiller in r138794.  This patch fixes the
problem for all register allocators, and includes a small test case.

<rdar://problem/10032939>

llvm-svn: 138944
 2011-09-01 17:18:50 +00:00
Evan Cheng
6f4f659df2 Teach MachineLICM reg pressure tracking code to deal with MVT::untyped. Sorry, I can't come up with a small test case. rdar://10043690 
llvm-svn: 138934
 2011-09-01 01:45:00 +00:00
Bill Wendling
196167f986 Update to new EH scheme. 
llvm-svn: 138933
 2011-09-01 01:28:25 +00:00
Bill Wendling
a6d17107f5 Resubmit with fix. Properly remove the instructions except for landingpad, which should be removed only when its invokes are. 
llvm-svn: 138932
 2011-09-01 01:28:11 +00:00
Bill Wendling
d984ff9663 Submitted this too early. 
llvm-svn: 138931
 2011-09-01 01:18:33 +00:00
Bill Wendling
37fc90ccd9 Don't DCE the landingpad instruction. 
The landingpad instruction can be removed only when its invokes are removed.

llvm-svn: 138930
 2011-09-01 01:16:58 +00:00
Bill Wendling
68ada987a1 Update to new EH scheme. 
llvm-svn: 138928
 2011-09-01 01:08:21 +00:00
Bill Wendling
6ebcfea89e Update to new EH scheme. 
llvm-svn: 138927
 2011-09-01 01:02:41 +00:00
Bill Wendling
0b2e131798 Update some tests to the new EH scheme. 
llvm-svn: 138925
 2011-09-01 00:58:03 +00:00
Andrew Trick
e5d7c0d111 PreRA scheduler should avoid cloning compares. 
Added canClobberReachingPhysRegUse() to handle a particular pattern in
which a two-address instruction could be forced to interfere with
EFLAGS, causing a compare to be unnecessarilly cloned.
Fixes rdar://problem/5875261

llvm-svn: 138924
 2011-09-01 00:54:31 +00:00
Bill Wendling
220f6a3b14 Don't forget to add the landingpad and resume instructions to the InstructionList. 
This was found via a nightly build of 483.xalancbmk.

llvm-svn: 138923
 2011-09-01 00:50:20 +00:00
Jim Grosbach
2b04342a91 Thumb2 assembly parsing and encoding for ADD(immediate). 
llvm-svn: 138922
 2011-09-01 00:28:52 +00:00
Chad Rosier
aa490636db Fixup for functions that return a bool. 
llvm-svn: 138918
 2011-08-31 23:49:05 +00:00
Bill Wendling
f3c35d972d Reenable test. 
llvm-svn: 138916
 2011-08-31 23:08:05 +00:00
Bill Wendling
fc2565227c Revert accidental commit 
llvm-svn: 138915
 2011-08-31 23:07:46 +00:00
Eli Friedman
5e68a0aca8 Disable this test until Bill fixes it properly. 
llvm-svn: 138914
 2011-08-31 23:03:30 +00:00
Jim Grosbach
1af1d2dfda Static relocation model Thumb jump table interworking. 
Make sure the low bit of the PC is set when loading an address directly
for jump tables in static relocation model.

llvm-svn: 138912
 2011-08-31 22:23:09 +00:00
Owen Anderson
dd71d9efb9 The asm parser currently selects the wrong encoding for non-conditional Thumb2 branches. However, this exposed a number of situations where the decoder was too permissive in allowing invalid instructions to decode successful. Specify additional fixed bits to close those gaps. 
llvm-svn: 138910
 2011-08-31 22:00:41 +00:00
Bill Wendling
8b764c6aa5 Update to new EH scheme. 
llvm-svn: 138908
 2011-08-31 21:50:07 +00:00
Bill Wendling
e540c593ec Update to new EH scheme. 
llvm-svn: 138906
 2011-08-31 21:44:24 +00:00
Bill Wendling
66b613c8b9 Remove old declare statements. 
llvm-svn: 138905
 2011-08-31 21:41:20 +00:00