Commit Graph

9846 Commits

Author SHA1 Message Date
Jim Grosbach
869f73322d Remove trailing whitespace
llvm-svn: 103807
2010-05-14 21:20:46 +00:00
Jim Grosbach
f15a56edfc 80 column and trailing whitespace cleanup
llvm-svn: 103806
2010-05-14 21:19:48 +00:00
Jim Grosbach
7a50cfb682 add cmd line option to leave dbgvalues in during post-RA sceduling. Useful
while debugging what's mishandled about them in the post-RA pass.

llvm-svn: 103805
2010-05-14 21:18:04 +00:00
Bill Wendling
e346a38ed4 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802
2010-05-14 21:14:32 +00:00
Devang Patel
2b99c27e47 Add support to preserve type info for the variables that are removed by the optimizer.
llvm-svn: 103798
2010-05-14 21:01:35 +00:00
Jakob Stoklund Olesen
4715605740 When verifying two-address instructions, check the following:
- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797
2010-05-14 20:28:32 +00:00
Jakob Stoklund Olesen
3eac02b22f Simplify the handling of physreg defs and uses in RegAllocFast.
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784
2010-05-14 18:03:25 +00:00
Daniel Dunbar
3c261b3ff8 XFAIL the test I added with vg_leak, apparently it is the first and only llc
-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

llvm-svn: 103769
2010-05-14 07:47:51 +00:00
Daniel Dunbar
26fa01eb86 Inline Asm: Ensure buffer is newline terminated to match how the text is printed.
- This is a hack, but I can't decide the best place to handle this. Chris?

llvm-svn: 103765
2010-05-14 04:31:50 +00:00
Jakob Stoklund Olesen
892983155c Enable opportunistic coalescing
llvm-svn: 103764
2010-05-14 04:30:51 +00:00
Jakob Stoklund Olesen
f913d9f2b8 Trust kill flags from isel and later passes.
llvm-svn: 103748
2010-05-14 00:02:23 +00:00
Jakob Stoklund Olesen
aa38789fd4 Fix an embarrassing runtime regression for RegAllocFast.
This loop is quadratic in the capacity for a DenseMap:

  while(!map.empty())
    map.erase(map.begin());

Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.

llvm-svn: 103747
2010-05-14 00:02:20 +00:00
Dale Johannesen
9f19b6a761 Implement a correct ui64->f32 conversion. The old
one was subject to double rounding in extreme cases.

llvm-svn: 103744
2010-05-13 23:50:42 +00:00
Jakob Stoklund Olesen
b698dfd8c7 Clean up RegAllocFast debug output
llvm-svn: 103739
2010-05-13 20:43:17 +00:00
Dan Gohman
33e9c347bf Teach MachineLICM and MachineSink how to clear kill flags conservatively
when they move instructions.

llvm-svn: 103737
2010-05-13 20:34:42 +00:00
Dan Gohman
223379b3a9 Add a utility function for conservatively clearing kill flags, and make
use of it in MachineCSE.

llvm-svn: 103726
2010-05-13 19:24:00 +00:00
Dan Gohman
d7b4c5b82e An Instruction has a trivial kill only if its use is in the same
basic block.

llvm-svn: 103725
2010-05-13 19:19:32 +00:00
Jakob Stoklund Olesen
d99818256c Take allocation hints from copy instructions to/from physregs.
This causes way more identity copies to be generated, ripe for coalescing.

llvm-svn: 103686
2010-05-13 00:19:43 +00:00
Jakob Stoklund Olesen
69f3ae8789 More asserts around physreg uses
llvm-svn: 103685
2010-05-13 00:19:39 +00:00
Evan Cheng
791573787a If REG_SEQUENCE source is livein, copy it first. Also, update livevariables information when a copy is introduced.
llvm-svn: 103680
2010-05-13 00:00:35 +00:00
Evan Cheng
8134a2e87b Do not attempt copy coalescing if the source and dest sub-register indices do not match.
llvm-svn: 103679
2010-05-12 23:59:42 +00:00
Jakob Stoklund Olesen
7d1323d9a5 Make sure to add kill flags to the last use of a virtreg when it is redefined.
The X86 floating point stack pass and others depend on good kill flags.

llvm-svn: 103635
2010-05-12 18:46:03 +00:00
Duncan Sands
bd83ac415f Remove unused variable. Tweak a comment while there.
llvm-svn: 103586
2010-05-12 07:11:33 +00:00
Nathan Jeffords
9952bcf9f6 updated support for the COFF .linkonce
Now, the .linkonce directive is emitted as part of MCSectionCOFF::PrintSwitchToSection instead of AsmPrinter::EmitLinkage since it is an attribute of the section the symbol was placed into not the symbol itself.

llvm-svn: 103568
2010-05-12 04:26:09 +00:00
Evan Cheng
5b48257a73 Teach local regalloc about virtual registers with sub-indices.
llvm-svn: 103539
2010-05-12 01:29:36 +00:00
Evan Cheng
29c800f0f0 Code clean up.
llvm-svn: 103538
2010-05-12 01:27:49 +00:00
Jakob Stoklund Olesen
b3ca444697 Avoid scoping issues, fix buildbots
llvm-svn: 103530
2010-05-12 00:11:19 +00:00
Dan Gohman
03e407ed83 Add initial kill flag support to FastISel.
llvm-svn: 103529
2010-05-11 23:54:07 +00:00
Daniel Dunbar
5d81e1a0bf Make Clang happy.
llvm-svn: 103528
2010-05-11 23:53:13 +00:00
Jakob Stoklund Olesen
e6eee8913f Store the Dirty bit in the LiveReg structure instead of a bit vector.
llvm-svn: 103522
2010-05-11 23:24:47 +00:00
Jakob Stoklund Olesen
063844f706 Keep track of the last place a live virtreg was used.
This allows us to add accurate kill markers, something the scavenger likes.
Add some more tests from ARM that needed this.

llvm-svn: 103521
2010-05-11 23:24:45 +00:00
Dan Gohman
2ace137eb9 Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn't
create separate virtual registers for CopyFromReg values, so uses of
them don't necessarily kill the value.

llvm-svn: 103519
2010-05-11 21:59:14 +00:00
Jakob Stoklund Olesen
bea7fa3416 Silence warning
llvm-svn: 103508
2010-05-11 20:51:04 +00:00
Jakob Stoklund Olesen
e27902ac68 Simplify the tracking of used physregs to a bulk bitor followed by a transitive
closure after allocating all blocks.

Add a few more test cases for -regalloc=fast.

llvm-svn: 103500
2010-05-11 20:30:28 +00:00
Duncan Sands
7d5e4152c3 I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.

llvm-svn: 103495
2010-05-11 20:16:09 +00:00
Dan Gohman
ca2df906ae Trim #includes and forward declarations.
llvm-svn: 103489
2010-05-11 19:11:43 +00:00
Jakob Stoklund Olesen
442e38c4de Mostly rewrite RegAllocFast.
Sorry for the big change. The path leading up to this patch had some TableGen
changes that I didn't want to commit before I knew they were useful. They
weren't, and this version does not need them.

The fast register allocator now does no liveness calculations. Instead it relies
on kill flags provided by isel. (Currently those kill flags are also ignored due
to isel bugs). The allocation algorithm is supposed to work with any subset of
valid kill flags. More kill flags simply means fewer spills inserted.

Registers are allocated from a working set that contains no aliases. That means
most allocations can be done directly without expensive alias checks. When the
working set runs out of registers we do the full alias check to find new free
registers.

llvm-svn: 103488
2010-05-11 18:54:45 +00:00
Dan Gohman
fb6f4da0e0 Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.

llvm-svn: 103481
2010-05-11 17:31:57 +00:00
Douglas Gregor
2f2491405a Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!
llvm-svn: 103457
2010-05-11 06:17:44 +00:00
Evan Cheng
97fc5247c8 It's not safe eliminate copies where src and dst have different sub-register indices.
llvm-svn: 103450
2010-05-11 00:20:03 +00:00
Evan Cheng
b4ac902aee Ensure REG_SEQUENCE source operands are unique.
llvm-svn: 103449
2010-05-11 00:04:31 +00:00
Evan Cheng
de3482f4af Indentation.
llvm-svn: 103441
2010-05-10 23:08:19 +00:00
Devang Patel
23f7323e7f Enable multiple Compile Units in one module.
This means now 'llvm-ld a.bc b.bc' will preserve debug info appropriately.

llvm-svn: 103439
2010-05-10 22:49:55 +00:00
Evan Cheng
119fec2a67 It's not safe to propagate implicit_def that defines part of a register.
llvm-svn: 103436
2010-05-10 21:25:30 +00:00
Evan Cheng
040646a78e Clear RegSequences vector after eliminating REG_SEQUENCE instructions.
llvm-svn: 103435
2010-05-10 21:24:55 +00:00
Evan Cheng
df350445c6 Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
llvm-svn: 103419
2010-05-10 19:03:57 +00:00
Evan Cheng
9f622b5659 Re-defined valno is always valno even for partial re-def's.
llvm-svn: 103410
2010-05-10 17:33:49 +00:00
Bob Wilson
776d3dcfb4 Fix PR7096. When a block containing multiple defs is tail duplicated, the
SSAUpdater for the value from the first def may see uses of undefined values,
because the later defs will not have been updated yet.

llvm-svn: 103407
2010-05-10 17:14:26 +00:00
Duncan Sands
83c7bda62e Add an assertion to catch attempts to access off the end of the array.
Based on a patch by Javier Martinez.

llvm-svn: 103391
2010-05-10 04:54:28 +00:00
Devang Patel
eed188e776 Instead of just verifying compile unit, verify entire type, variable, namespace etc..
llvm-svn: 103327
2010-05-07 23:33:41 +00:00
Devang Patel
14f07a8625 Remove DIGlobal.
llvm-svn: 103325
2010-05-07 23:19:07 +00:00
Dan Gohman
95040c18f4 SDDbgValues are apparently not being legalized. Fix a symptom of the problem,
and not the real problem itself, by dropping debug info for i128 values.
rdar://7958162.

llvm-svn: 103310
2010-05-07 22:19:08 +00:00
Devang Patel
3c2f4664fc Verify variable directly.
llvm-svn: 103305
2010-05-07 22:04:20 +00:00
Chris Lattner
e72e3e9c12 add COFF support for COMDAT sections, patch by Nathan Jeffords!
llvm-svn: 103304
2010-05-07 21:49:09 +00:00
Devang Patel
e7333c8318 Verify entire type descriptor not just tag.
llvm-svn: 103303
2010-05-07 21:45:47 +00:00
Dale Johannesen
1ee37ac5d4 Fix PR 7087, and probably other things, by extending
getConstantFP to accept the two supported long double
target types.  This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.

llvm-svn: 103299
2010-05-07 21:35:53 +00:00
Devang Patel
0638b539bb Wrap const MDNode * inside DIDescriptor.
llvm-svn: 103295
2010-05-07 20:54:48 +00:00
Devang Patel
02bb578ffd Avoid DIDescriptor::getNode(). Use overloaded operators instead.
llvm-svn: 103272
2010-05-07 18:11:54 +00:00
Chris Lattner
c1d0e3a79e switch MCSectionCOFF from a syntactic to semantic representation,
patch by Peter Housel!

llvm-svn: 103267
2010-05-07 17:17:41 +00:00
Nick Lewycky
3e5720a898 Revert r103133 and add testcase from PR7066.
llvm-svn: 103233
2010-05-07 01:45:38 +00:00
Dan Gohman
4d75cfcc09 Transfer debug location information from PHI nodes to resulting
lowered copies.

llvm-svn: 103228
2010-05-07 01:10:20 +00:00
Dan Gohman
6650aa28f1 Print debug information for SDNodes.
llvm-svn: 103227
2010-05-07 01:09:21 +00:00
Dan Gohman
f863ad3dc5 Disable the new unknown-location code for now. It causes a major
increase in the debug line info section, and it's causing
regressions in a gdb testsuite.

llvm-svn: 103226
2010-05-07 01:08:53 +00:00
Dan Gohman
497e752655 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.

llvm-svn: 103194
2010-05-06 20:33:48 +00:00
Evan Cheng
80f3051bb7 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Evan Cheng
64f7afeec1 80 col violation.
llvm-svn: 103185
2010-05-06 16:33:12 +00:00
Evan Cheng
07a622c7b6 Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.ll
with the fix in 103157.

%reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0
is not coalescable since none of the super-registers of S1 are in reg1039's
register class: DPR_VFP2. But it is still a legal copy instruction so it should
not assert.

llvm-svn: 103170
2010-05-06 06:23:31 +00:00
Dan Gohman
365b0e0f0f Update LabelsBeforeInsn also, when creating unknown-position labels.
llvm-svn: 103145
2010-05-06 00:29:41 +00:00
Chris Lattner
014a954e3d Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol twice!"' failed.
Users can write broken code that emits the same label twice with asm renaming,
detect this and emit a fatal backend error instead of aborting.

llvm-svn: 103140
2010-05-06 00:05:37 +00:00
Dan Gohman
f7bc83b2ed In bottom-up mode, defer the materialization of local constant values.
llvm-svn: 103139
2010-05-06 00:02:14 +00:00
Dan Gohman
180422793f Add an "IsBottomUp" member function to FastISel, which will be used to
support a new bottom-up mode.

llvm-svn: 103138
2010-05-05 23:58:35 +00:00
Dan Gohman
2f1182c0ac Emit debug info for MachineInstrs with unknown debug locations, instead
of just letting them inherit the debug locations of adjacent instructions.

Debug info should aim to be either accurate or absent.

llvm-svn: 103135
2010-05-05 23:41:32 +00:00
Jakob Stoklund Olesen
2e5d12acfa Fix PR6520. An earlyclobber physreg must not be allocated to anything else.
llvm-svn: 103133
2010-05-05 23:07:41 +00:00
Devang Patel
041a8fa086 Use getValue() for PHINodes when direct NodeMap access does not work.
llvm-svn: 103126
2010-05-05 22:29:00 +00:00
Evan Cheng
d7bc27a079 Move REG_SEQUENCE removal to 2addr pass.
llvm-svn: 103109
2010-05-05 18:45:40 +00:00
Evan Cheng
25c07ac593 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
80      %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120     %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0

llvm-svn: 103102
2010-05-05 18:27:40 +00:00
Bob Wilson
e81252b747 Combine the implementations of the core part of the SSAUpdater and
MachineSSAUpdater to avoid duplicating all the code.

llvm-svn: 103060
2010-05-04 23:18:19 +00:00
Evan Cheng
9cd91d458a Teach PHI elimination to remove REG_SEQUENCE instructions and update references of the source operands with references of the destination with subreg indices. e.g.
%reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ...
%reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6
=>
%reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ...

PHI elimination now does more than phi elimination. It is really a de-SSA pass.

llvm-svn: 103039
2010-05-04 20:26:52 +00:00
Evan Cheng
9bdd9f4746 Rename variables for consistency.
llvm-svn: 103013
2010-05-04 17:12:26 +00:00
Devang Patel
ee7c7143dc Set DW_AT_APPLE_omit_frame_ptr in endFunction() where MachineFunction is available all the time.
llvm-svn: 103001
2010-05-04 06:15:30 +00:00
Evan Cheng
66ef3ff9c7 Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489
llvm-svn: 102993
2010-05-04 00:58:39 +00:00
Evan Cheng
f7b5c86a0b Teach scheduler about REG_SEQUENCE.
llvm-svn: 102984
2010-05-04 00:22:40 +00:00
Dan Gohman
50b08bfbc8 Re-enable isel kill flags, now that the local allocator is ignoring them.
llvm-svn: 102981
2010-05-04 00:12:15 +00:00
Jakob Stoklund Olesen
4ef97cf59c Remove preexisting kill flags in RegAllocLocal, just like LiveVariables does.
This should make it possible to start producing kill flags in isel without
breaking stuff.

llvm-svn: 102976
2010-05-03 23:49:20 +00:00
Dan Gohman
8bfd5f99b5 Factor out FastISel's code for materializing constants and other values
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.

llvm-svn: 102975
2010-05-03 23:36:34 +00:00
Jakob Stoklund Olesen
51ab2653d5 Check that subregisters don't have independent values in RemoveCopyByCommutingDef().
This fixes PR6941.

llvm-svn: 102970
2010-05-03 22:40:32 +00:00
Eric Christopher
cbbb35694f Reword a comment slightly.
llvm-svn: 102966
2010-05-03 22:18:49 +00:00
Bob Wilson
9c9622768e Print basic block numbers in live interval debug output. Since the rest of the
debug output is showing machine instructions, the IR-level basic block names
aren't very meaningful, and because multiple machine basic blocks may be
derived from one IR-level BB, they're also not unique.

llvm-svn: 102960
2010-05-03 21:38:11 +00:00
Dan Gohman
15cb983f55 Fix a bug which prevented tail merging of return instructions in
beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.

The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.

Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.

And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.

llvm-svn: 102907
2010-05-03 14:35:47 +00:00
Dale Johannesen
a8f83a5f1b Don't count debug info as instructions. This was
preventing the emission of the NOP on Darwin for a
function with no actual code.  From timberwolfmc
with TEST=optllcdbg.

llvm-svn: 102843
2010-05-01 16:41:11 +00:00
Anton Korobeynikov
a3726088fa Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
when needed. This fixes PR7001

llvm-svn: 102838
2010-05-01 12:52:34 +00:00
Dan Gohman
ada97c52fe Remove the code for special-casing byval for fast-isel. SelectionDAG
handles argument lowering anyway, so there's no need for special
casing here.

llvm-svn: 102828
2010-05-01 02:44:23 +00:00
Dan Gohman
fb5d6a5d70 Re-disable kill flags, as there is more trouble.
llvm-svn: 102826
2010-05-01 01:57:56 +00:00
Dan Gohman
5fc96b81ec Re-enable kill flags from SelectionDAGISel, with a fix: don't
try to put a kill flag on a DBG_INFO instruction.

llvm-svn: 102820
2010-05-01 00:50:53 +00:00
Dale Johannesen
c0bf114984 Fix a bug where debug info affected stack slot coloring.
Seen in SingleSrc/Benchmarks/Misc/flops with TEST=optllcdbg.
7929951.

llvm-svn: 102819
2010-05-01 00:41:15 +00:00
Dan Gohman
1a6c7dfb3e Fix whitespace.
llvm-svn: 102817
2010-05-01 00:33:28 +00:00
Dan Gohman
37fe41a8c0 Don't pass SDValues by non-const reference unless they may be
modified.

llvm-svn: 102816
2010-05-01 00:33:16 +00:00
Dan Gohman
0561bd78d0 Reorgnaize more switch code lowering to clean up some tricky
code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.

Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.

llvm-svn: 102814
2010-05-01 00:25:44 +00:00
Dan Gohman
d59de31ce2 Delete the EdgeMapping variable itself.
llvm-svn: 102810
2010-05-01 00:02:20 +00:00
Dan Gohman
68f04d06c8 Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.

llvm-svn: 102809
2010-05-01 00:01:06 +00:00
Bill Wendling
95a4929ac7 EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but the
indexes could be of a different value type. Or not even using the same SDNode
for the constant (weird, I know). Compare the actual values instead of the
pointers.

llvm-svn: 102791
2010-04-30 22:19:17 +00:00
Dan Gohman
e980525516 Remove this debug output. The MachineFunction will be printed once all of
instruction selection is done; it's confusing to see parts of it printed,
while other parts are omitted, along the way.

llvm-svn: 102771
2010-04-30 21:21:21 +00:00
Jakob Stoklund Olesen
fac584ed9e The local register allocator has to spill dirty callee saved registers before a
call that might throw. The landing pad assumes that all registers are in stack
slots.

We used to spill those dirty CSRs after the call, and the stack slots would be
wrong when arriving at the landing pad.

llvm-svn: 102770
2010-04-30 21:19:29 +00:00
Devang Patel
52c2d4d378 Attach AT_APPLE_optimized attribute to optimized function's debug info.
llvm-svn: 102743
2010-04-30 19:38:23 +00:00
Dan Gohman
066b8d3640 EmitDbgValue doesn't need its EdgeMapping argument.
llvm-svn: 102742
2010-04-30 19:35:33 +00:00
Jakob Stoklund Olesen
1fb8dbce5a Don't use floating point in SimpleRegisterCoalescing.
Rounding differences causes tests to fail on Linux.

llvm-svn: 102729
2010-04-30 18:28:11 +00:00
Dan Gohman
e9ff394082 Apply a patch from Jan Sjodin to fix a compiler abort on vector
comparisons sign-extended to a different bitwidth than the
comparison operands.

llvm-svn: 102721
2010-04-30 17:19:19 +00:00
Dan Gohman
140e0899ad Temporarily disable SelectionDAG kill flags, which are causing trouble.
llvm-svn: 102680
2010-04-30 00:32:51 +00:00
Dan Gohman
1534ad2d28 Set register kill flags on the SelectionDAG path, at least in the
easy cases.

llvm-svn: 102678
2010-04-30 00:08:21 +00:00
Jakob Stoklund Olesen
01254ea96d Reject really weird coalescer case when trying to merge identical subregisters
of different register classes. e.g.

  %reg1048:3<def> = EXTRACT_SUBREG %RAX<kill>, 3

Where %reg1048 is a GR32 register. This is not impossible to handle, but it is
pretty hard and very rare.

This should unbreak the dragonegg builder.

llvm-svn: 102672
2010-04-29 23:47:46 +00:00
Dan Gohman
b8cdd4037b Fix typos in assertion strings.
llvm-svn: 102666
2010-04-29 23:25:34 +00:00
Jakob Stoklund Olesen
1fea22bc70 Slightly verboser debug spew from coalescer
llvm-svn: 102663
2010-04-29 22:21:48 +00:00
Devang Patel
bdfc01f418 Refactor.
llvm-svn: 102661
2010-04-29 20:40:36 +00:00
Dale Johannesen
a4fd142987 Make naked functions work on PPC.
llvm-svn: 102657
2010-04-29 19:32:19 +00:00
Devang Patel
c34efcfee7 Print variable scope name in DEBUG_VALUE comment. Useful in some cases. e.g.
##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0
	##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0
	##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706
	##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0
	##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0

llvm-svn: 102655
2010-04-29 18:52:10 +00:00
Evan Cheng
8ea213f823 Remove DBG_VALUE which reference dead stack slots.
llvm-svn: 102654
2010-04-29 18:51:00 +00:00
Devang Patel
1e28f36308 DO not push DBG_VALUE machine instructions for inlined fuction arguments in entry block.
llvm-svn: 102653
2010-04-29 18:50:36 +00:00
Evan Cheng
b9fe4fd40c Add comment.
llvm-svn: 102606
2010-04-29 06:58:53 +00:00
Evan Cheng
ba7dcad569 Re-enable 102565 with fixes.
llvm-svn: 102602
2010-04-29 06:33:38 +00:00
Evan Cheng
3e9545cfb4 Temporarily disable my changes to unbreak the build.
llvm-svn: 102590
2010-04-29 03:34:19 +00:00
Evan Cheng
053000f3f5 Do not generate duplicate dbg_value instructions for function arguments.
llvm-svn: 102585
2010-04-29 01:40:30 +00:00
Dan Gohman
ec9e1d8a88 Fix missing #include.
llvm-svn: 102584
2010-04-29 01:39:13 +00:00
Evan Cheng
801b8e5530 Avoid emitting a dbg_value machineinstr that's not going to be inserted into entry block.
llvm-svn: 102581
2010-04-29 01:23:55 +00:00
Evan Cheng
d08e8f2b24 Check Reg against zero.
llvm-svn: 102573
2010-04-29 00:59:34 +00:00
Evan Cheng
4137a14e18 - Really preserve dbg_value instructions when the register is spilled.
- Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments.

llvm-svn: 102565
2010-04-28 23:52:26 +00:00
Devang Patel
84e3ddd87c tidy up.
llvm-svn: 102558
2010-04-28 23:24:13 +00:00
Evan Cheng
a02c9072fc Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.
llvm-svn: 102554
2010-04-28 23:08:54 +00:00
Evan Cheng
fb33f168e0 Pretty print DBG_VALUE machine instructions.
Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707

llvm-svn: 102518
2010-04-28 20:03:13 +00:00
Chris Lattner
9867c1a075 Rework global alignment computation again. Now we do round up
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).

llvm-svn: 102515
2010-04-28 19:58:07 +00:00
Devang Patel
181c86e4e7 While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing.
llvm-svn: 102513
2010-04-28 19:27:33 +00:00
Jakob Stoklund Olesen
bf2915f891 Recompute kill flags from live intervals after coalescing instead of trying to
update them. Computing kill flags is notoriously difficult, and the coalescer
would get it wrong sometimes, and it would completely skip physical registers.

Now we simply remove kill flags based on the live intervals after coalescing.
This is a few percent slower, but now we get correct kill flags for physical
registers after coalescing.

llvm-svn: 102510
2010-04-28 18:28:39 +00:00
Evan Cheng
4561d60a2b Try operation promotion only if regular dag combine and target-specific ones failed to do anything.
llvm-svn: 102492
2010-04-28 07:10:39 +00:00
Devang Patel
570e9d53a7 Emit debug info for byval parameters.
llvm-svn: 102486
2010-04-28 01:39:28 +00:00
Chris Lattner
19715b76b7 further simplify EmitAlignment by eliminating the
ForcedAlignBits argument, tweaking the single client of it.

llvm-svn: 102484
2010-04-28 01:08:40 +00:00
Chris Lattner
d14f04d0f7 remove a dead argument to EmitAlignment.
llvm-svn: 102483
2010-04-28 01:06:02 +00:00
Chris Lattner
d3cfa7f3eb remove some default arguments to EmitAlignment.
llvm-svn: 102482
2010-04-28 01:05:45 +00:00
Devang Patel
d848109a46 Refactor.
llvm-svn: 102481
2010-04-28 01:03:09 +00:00
Devang Patel
06f4482831 Use isReg(), isImm() and isFPImm().
llvm-svn: 102470
2010-04-27 22:04:41 +00:00
Devang Patel
5d20a6c621 Check operand type first.
llvm-svn: 102468
2010-04-27 21:49:04 +00:00
Devang Patel
8b3c1ffb8b Ignore DBG_VALUE instructions that points to undef values.
llvm-svn: 102463
2010-04-27 20:54:45 +00:00
Evan Cheng
94bcca7004 - When legal, promote a load to zextload rather than ext load.
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)

llvm-svn: 102455
2010-04-27 19:48:13 +00:00
Devang Patel
4698fffbb8 Identify when a lexical scope is split in to multiple instruction ranges. Emit such ranges using DW_AT_ranges.
This patch fixes bug (PR6894) introduced by previous version of this patch.

llvm-svn: 102454
2010-04-27 19:46:33 +00:00
Evan Cheng
2aaefc6167 Do not count kill, implicit_def instructions as printed instructions.
llvm-svn: 102453
2010-04-27 19:38:45 +00:00
Chris Lattner
a9c1328501 round zero-byte .zerofill directives up to 1 byte. This
should fix some "g++.dg-struct-layout-1" failures, 
rdar://7886017

llvm-svn: 102421
2010-04-27 07:41:44 +00:00
Dale Johannesen
244d2bdb24 Revert a small part of 102372; this fixes at least one
of the dbg testsuite regressions.  I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.

llvm-svn: 102410
2010-04-27 02:10:05 +00:00
Chris Lattner
df345f8909 add a comment in verbose-asm mode indicating why a noop is being generated.
llvm-svn: 102401
2010-04-26 23:41:43 +00:00
Chris Lattner
9292bad5f5 on darwin empty functions need to codegen into something of non-zero length,
otherwise labels get incorrectly merged.  We handled this by emitting a 
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes.  Handle this by emitting a noop.  This
is more gross than it should be because arm/ppc are not fully mc'ized yet.

This fixes rdar://7908505

llvm-svn: 102400
2010-04-26 23:37:21 +00:00
Bob Wilson
6547515094 Avoid adding a null MD node operand, which crashes with "-debug" when trying
to print the operand.

llvm-svn: 102395
2010-04-26 22:56:56 +00:00
Devang Patel
ac2c76f813 Use DW_AT_entry_pc instead of DW_AT_low_pc/DW_AT_high_pc pair. This simplifies debug range entries.
llvm-svn: 102394
2010-04-26 22:54:28 +00:00
Dale Johannesen
2f1de9e0c1 Remove crufty comments.
llvm-svn: 102380
2010-04-26 20:48:54 +00:00