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175 Commits

Author SHA1 Message Date
Ruchira Sasanka
0b842b90ef Fixed bug - added code in pushUnconstrainedIGNodes() to check whether a node 
is already pushed to stack by a previous call to the same method.

llvm-svn: 1154
 2001-11-06 15:25:38 +00:00
Vikram S. Adve
f83b90af5c Bug fix: uninitialized variable. 
llvm-svn: 1147
 2001-11-06 05:11:05 +00:00
Vikram S. Adve
c3993d28ca Modified graph construction to use one pass to find all defs. 
Avoids having to handle some special cases that cause complex interactions
with instr. selection.

llvm-svn: 1138
 2001-11-05 04:04:23 +00:00
Vikram S. Adve
24fbd417a0 Make reg. numbers signed ints. 
llvm-svn: 1137
 2001-11-05 03:56:02 +00:00
Chris Lattner
ea63d43a07 Minor method rename 
llvm-svn: 1119
 2001-11-04 08:08:34 +00:00
Ruchira Sasanka
b5a9b22fa7 Added an assertion since it seems like AdjList returns an errornous size in method 
IGNode::pushOnStack().

llvm-svn: 1116
 2001-11-03 22:01:09 +00:00
Ruchira Sasanka
77cc18917c Added support for correct spilling of %ccr 
llvm-svn: 1112
 2001-11-03 20:41:22 +00:00
Ruchira Sasanka
116fbe7fc7 Arranged stack frame - needs furhter organization 
llvm-svn: 1108
 2001-11-03 17:14:44 +00:00
Ruchira Sasanka
7673c5f6e0 Arranged stack frame - needs furhter organization 
Moved InsertCallerSaveInstr to the SparcRegInfo.cpp

llvm-svn: 1106
 2001-11-03 17:13:27 +00:00
Vikram S. Adve
7cb485ebbd Record constants that need to be emitted in the assembly code. 
llvm-svn: 1010
 2001-10-28 21:46:23 +00:00
Vikram S. Adve
ffe94cb175 Allow combinations of True/Anti/Output flags for each edge to 
support, e.g., dependences on Call instructions.

llvm-svn: 1009
 2001-10-28 21:45:02 +00:00
Vikram S. Adve
9515b10102 Add edges between call instructions and (a) load/store instructions, and 
(b) any instructions that use or set CC registers.  Whether or not the
latter are needed really should be machine-dependent.

llvm-svn: 1008
 2001-10-28 21:43:33 +00:00
Ruchira Sasanka
3c4d2dea7c Added support for spilling 
llvm-svn: 992
 2001-10-28 18:15:12 +00:00
Ruchira Sasanka
e095b077cf Added spill code support; moved insertCallerSaving to SparRegInfo since 
we need to handle %ccr reg in a special way.

llvm-svn: 990
 2001-10-28 18:12:02 +00:00
Ruchira Sasanka
9aa7352c15 added support to move "added instructions" after the delay slot 
llvm-svn: 968
 2001-10-23 21:38:42 +00:00
Ruchira Sasanka
155cb5a9c4 Added support to move "added instructions" after the delay slot 
llvm-svn: 967
 2001-10-23 21:38:00 +00:00
Vikram S. Adve
21da1db37f Use class MachineCodeForMethod to print machine code. 
llvm-svn: 948
 2001-10-22 13:52:03 +00:00
Vikram S. Adve
c63a39ae14 Added class MachineCodeForMethod. 
llvm-svn: 947
 2001-10-22 13:51:33 +00:00
Vikram S. Adve
1beadb278b Cosmetic changes only. 
llvm-svn: 946
 2001-10-22 13:51:09 +00:00
Vikram S. Adve
5acd0fb918 Modify code that processes delay slots so that it preserves any 
useful instructions already inserted into delay slots.

llvm-svn: 945
 2001-10-22 13:49:27 +00:00
Ruchira Sasanka
6df15c541f Added support for both call/jmpl instructions 
llvm-svn: 930
 2001-10-21 16:43:41 +00:00
Ruchira Sasanka
95e437ec1b Added code to support unusable Suggested Colors. 
llvm-svn: 922
 2001-10-19 21:42:06 +00:00
Ruchira Sasanka
b80714a64a Added code to PhyRegAlloc to mark unusable suggested regs 
Added initialization to AdjList to IGNode constructor - major bug fix

llvm-svn: 920
 2001-10-19 21:39:31 +00:00
Ruchira Sasanka
fe8055b8c1 Changed Call interference info 
llvm-svn: 917
 2001-10-19 17:21:59 +00:00
Ruchira Sasanka
1f65433b82 Corrected call interference bug 
llvm-svn: 916
 2001-10-19 17:21:03 +00:00
Ruchira Sasanka
67992edbfc no major change 
llvm-svn: 914
 2001-10-18 23:58:08 +00:00
Ruchira Sasanka
33e147a7d0 Added implict operand printing for operator( ostream, MachineInstr&) 
llvm-svn: 912
 2001-10-18 22:40:02 +00:00
Ruchira Sasanka
384b7b3479 removed some debug messages 
llvm-svn: 910
 2001-10-18 22:36:26 +00:00
Vikram S. Adve
34b17e8a37 1. Add a bottom-up pass on BURG trees that is used to fix constant operands. 
Needs to be bottom up because constant values may be forward-substituted
   to their uses (i.e., into the parent in the BURG tree).
2. Move most of the constant-fixup code into machine-indepedent file
   InstrSelectionSupport.cpp.

llvm-svn: 859
 2001-10-17 23:57:50 +00:00
Vikram S. Adve
abed788cd9 Separate VM instruction that generates the instructions that compute a value 
from the value itself (the one causing an edge) because the latter may be
a temporary used within the instruction sequence for the VM instruction.

llvm-svn: 858
 2001-10-17 23:55:16 +00:00
Vikram S. Adve
41be9ce333 *** empty log message *** 
llvm-svn: 857
 2001-10-17 23:53:16 +00:00
Ruchira Sasanka
471cf92f0e changed debugg message printing - no change to useful code 
llvm-svn: 850
 2001-10-16 16:34:44 +00:00
Ruchira Sasanka
6dd033bd31 No major change - commented some debug code 
llvm-svn: 849
 2001-10-16 01:33:55 +00:00
Ruchira Sasanka
26ab9c8e61 Added support for caller saving 
llvm-svn: 847
 2001-10-16 01:23:19 +00:00
Chris Lattner
be66ee81bd Print Debug Code to stderr instead of stdout so that it doesn't mess up the assembly output 
llvm-svn: 841
 2001-10-15 18:30:06 +00:00
Chris Lattner
683166c06e Output to cerr rather than cout so that debug info doesn't mess up assembly generation 
llvm-svn: 840
 2001-10-15 18:15:27 +00:00
Ruchira Sasanka
183e59e94a updated suggesting/coloring of call & return args & implicit operands. 
Changed added instr to a deque (from a vector)

llvm-svn: 831
 2001-10-15 16:26:38 +00:00
Ruchira Sasanka
54051b75a7 fixed a coalscing bug 
llvm-svn: 828
 2001-10-15 16:22:44 +00:00
Chris Lattner
b9e0153cfe * Fix privacy issues on RegToRefVecMap 
* Fix initialization order problems...

llvm-svn: 762
 2001-10-13 06:51:01 +00:00
Ruchira Sasanka
bba7b347fb --corrected coalescing test: coalsed only if two are of the same reg class 
llvm-svn: 729
 2001-10-12 17:48:18 +00:00
Vikram S. Adve
1fe4d4071c Add graph edges due to implicit refs in each machine instruction. 
llvm-svn: 724
 2001-10-11 04:22:45 +00:00
Vikram S. Adve
623324dea9 Don't insert useful instructions in delay slot of a RETURN. 
llvm-svn: 721
 2001-10-10 20:58:11 +00:00
Vikram S. Adve
2c19cf9a69 Machine-independent code generation routines used in instruction 
selection.  These used to live in several different places before.

llvm-svn: 719
 2001-10-10 20:50:43 +00:00
Vikram S. Adve
34c44524a7 Moved code generation support routines to InstrSelectionSupport.cpp. 
llvm-svn: 717
 2001-10-10 20:49:07 +00:00
Chris Lattner
08b1dde37e Commit more code over to new cast style 
llvm-svn: 697
 2001-10-02 03:41:24 +00:00
Chris Lattner
ad1b0a1a83 Convert more code to use new style casts 
Eliminate old style casts from value.h

llvm-svn: 696
 2001-10-01 20:11:19 +00:00
Chris Lattner
43781f1f96 Add support for new style casts 
llvm-svn: 694
 2001-10-01 16:18:37 +00:00
Ruchira Sasanka
294d643339 removing phy regaloc - incorrect file 
llvm-svn: 682
 2001-09-30 23:52:14 +00:00
Vikram S. Adve
8c431d2726 Change ! ( ...== ...) to !=. 
llvm-svn: 680
 2001-09-30 23:45:08 +00:00
Vikram S. Adve
7b68e7247a Improved dump for disp type operand. 
llvm-svn: 679
 2001-09-30 23:44:19 +00:00